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Stack overflow checking with stack probes.

Browse Source 
This adds a libcall name, a calling convention, and settings for
emitting stack probes, and implements them for x86 system_v ABIs.
This commit is contained in:
Dan Gohman
2018-04-20 21:41:45 -07:00
parent c5b15c2396
commit 3b1d805758
20 changed files with 585 additions and 155 deletions
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32
cranelift/filetests/isa/x86/binary32.cton
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@@ -392,19 +392,37 @@ ebb0:
; asm: popl %ecx
[-,%rcx] v512 = x86_pop.i32 ; bin: 59
; Adjust Stack Pointer
; Adjust Stack Pointer Up
; asm: addl $64, %esp
adjust_sp_imm 64 ; bin: 83 c4 40
adjust_sp_up_imm 64 ; bin: 83 c4 40
; asm: addl $-64, %esp
adjust_sp_imm -64 ; bin: 83 c4 c0
adjust_sp_up_imm -64 ; bin: 83 c4 c0
; asm: addl $1024, %esp
adjust_sp_imm 1024 ; bin: 81 c4 00000400
adjust_sp_up_imm 1024 ; bin: 81 c4 00000400
; asm: addl $-1024, %esp
adjust_sp_imm -1024 ; bin: 81 c4 fffffc00
adjust_sp_up_imm -1024 ; bin: 81 c4 fffffc00
; asm: addl $2147483647, %esp
adjust_sp_imm 2147483647 ; bin: 81 c4 7fffffff
adjust_sp_up_imm 2147483647 ; bin: 81 c4 7fffffff
; asm: addl $-2147483648, %esp
adjust_sp_imm -2147483648 ; bin: 81 c4 80000000
adjust_sp_up_imm -2147483648 ; bin: 81 c4 80000000
; Adjust Stack Pointer Down
; asm: subl %ecx, %esp
adjust_sp_down v1 ; bin: 29 cc
; asm: subl %esi, %esp
adjust_sp_down v2 ; bin: 29 f4
; asm: addl $64, %esp
adjust_sp_down_imm 64 ; bin: 83 ec 40
; asm: addl $-64, %esp
adjust_sp_down_imm -64 ; bin: 83 ec c0
; asm: addl $1024, %esp
adjust_sp_down_imm 1024 ; bin: 81 ec 00000400
; asm: addl $-1024, %esp
adjust_sp_down_imm -1024 ; bin: 81 ec fffffc00
; asm: addl $2147483647, %esp
adjust_sp_down_imm 2147483647 ; bin: 81 ec 7fffffff
; asm: addl $-2147483648, %esp
adjust_sp_down_imm -2147483648 ; bin: 81 ec 80000000
; Shift immediates
; asm: shll $2, %esi

32
cranelift/filetests/isa/x86/binary64.cton
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@@ -547,19 +547,37 @@ ebb0:
; asm: popq %r10
[-,%r10] v514 = x86_pop.i64 ; bin: 41 5a
; Adjust Stack Pointer
; Adjust Stack Pointer Up
; asm: addq $64, %rsp
adjust_sp_imm 64 ; bin: 48 83 c4 40
adjust_sp_up_imm 64 ; bin: 48 83 c4 40
; asm: addq $-64, %rsp
adjust_sp_imm -64 ; bin: 48 83 c4 c0
adjust_sp_up_imm -64 ; bin: 48 83 c4 c0
; asm: addq $1024, %rsp
adjust_sp_imm 1024 ; bin: 48 81 c4 00000400
adjust_sp_up_imm 1024 ; bin: 48 81 c4 00000400
; asm: addq $-1024, %rsp
adjust_sp_imm -1024 ; bin: 48 81 c4 fffffc00
adjust_sp_up_imm -1024 ; bin: 48 81 c4 fffffc00
; asm: addq $2147483647, %rsp
adjust_sp_imm 2147483647 ; bin: 48 81 c4 7fffffff
adjust_sp_up_imm 2147483647 ; bin: 48 81 c4 7fffffff
; asm: addq $-2147483648, %rsp
adjust_sp_imm -2147483648 ; bin: 48 81 c4 80000000
adjust_sp_up_imm -2147483648 ; bin: 48 81 c4 80000000
; Adjust Stack Pointer Down
; asm: subq %rcx, %rsp
adjust_sp_down v1 ; bin: 48 29 cc
; asm: subq %r10, %rsp
adjust_sp_down v3 ; bin: 4c 29 d4
; asm: subq $64, %rsp
adjust_sp_down_imm 64 ; bin: 48 83 ec 40
; asm: subq $-64, %rsp
adjust_sp_down_imm -64 ; bin: 48 83 ec c0
; asm: subq $1024, %rsp
adjust_sp_down_imm 1024 ; bin: 48 81 ec 00000400
; asm: subq $-1024, %rsp
adjust_sp_down_imm -1024 ; bin: 48 81 ec fffffc00
; asm: subq $2147483647, %rsp
adjust_sp_down_imm 2147483647 ; bin: 48 81 ec 7fffffff
; asm: subq $-2147483648, %rsp
adjust_sp_down_imm -2147483648 ; bin: 48 81 ec 80000000
; Shift immediates
; asm: shlq $12, %rsi

29
cranelift/filetests/isa/x86/probestack-adjusts-sp.cton Normal file
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@@ -0,0 +1,29 @@
test compile
set is_64bit=1
set colocated_libcalls=1
set probestack_func_adjusts_sp=1
isa x86
; Like %big in probestack.cton, but with the probestack function adjusting
; the stack pointer itself.
function %big() system_v {
ss0 = explicit_slot 300000
ebb0:
return
}
; check: function %big(i64 fp [%rbp]) -> i64 fp [%rbp] system_v {
; nextln: ss0 = explicit_slot 300000, offset -300016
; nextln: ss1 = incoming_arg 16, offset -16
; nextln: sig0 = (i64 [%rax]) probestack
; nextln: fn0 = colocated %Probestack sig0
; nextln:
; nextln: ebb0(v0: i64 [%rbp]):
; nextln: [RexOp1pushq#50] x86_push v0
; nextln: [RexOp1copysp#8089] copy_special %rsp -> %rbp
; nextln: [RexOp1pu_id#b8,%rax] v1 = iconst.i64 0x0004_93e0
; nextln: [Op1call_id#e8] call fn0(v1)
; nextln: [RexOp1adjustsp_id#8081] adjust_sp_up_imm 0x0004_93e0
; nextln: [RexOp1popq#58,%rbp] v2 = x86_pop.i64
; nextln: [Op1ret#c3] return v2
; nextln: }

25
cranelift/filetests/isa/x86/probestack-disabled.cton Normal file
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@@ -0,0 +1,25 @@
test compile
set is_64bit=1
set colocated_libcalls=1
set probestack_enabled=0
isa x86
; Like %big in probestack.cton, but with probes disabled.
function %big() system_v {
ss0 = explicit_slot 300000
ebb0:
return
}
; check: function %big(i64 fp [%rbp]) -> i64 fp [%rbp] system_v {
; nextln: ss0 = explicit_slot 300000, offset -300016
; nextln: ss1 = incoming_arg 16, offset -16
; nextln:
; nextln: ebb0(v0: i64 [%rbp]):
; nextln: [RexOp1pushq#50] x86_push v0
; nextln: [RexOp1copysp#8089] copy_special %rsp -> %rbp
; nextln: [RexOp1adjustsp_id#d081] adjust_sp_down_imm 0x0004_93e0
; nextln: [RexOp1adjustsp_id#8081] adjust_sp_up_imm 0x0004_93e0
; nextln: [RexOp1popq#58,%rbp] v1 = x86_pop.i64
; nextln: [Op1ret#c3] return v1
; nextln: }

28
cranelift/filetests/isa/x86/probestack-noncolocated.cton Normal file
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@@ -0,0 +1,28 @@
test compile
set is_64bit=1
isa x86
; Like %big in probestack.cton, but without a colocated libcall.
function %big() system_v {
ss0 = explicit_slot 300000
ebb0:
return
}
; check: function %big(i64 fp [%rbp]) -> i64 fp [%rbp] system_v {
; nextln: ss0 = explicit_slot 300000, offset -300016
; nextln: ss1 = incoming_arg 16, offset -16
; nextln: sig0 = (i64 [%rax]) -> i64 [%rax] probestack
; nextln: fn0 = %Probestack sig0
; nextln:
; nextln: ebb0(v0: i64 [%rbp]):
; nextln: [RexOp1pushq#50] x86_push v0
; nextln: [RexOp1copysp#8089] copy_special %rsp -> %rbp
; nextln: [RexOp1pu_id#b8,%rax] v1 = iconst.i64 0x0004_93e0
; nextln: [RexOp1fnaddr8#80b8,%r11] v2 = func_addr.i64 fn0
; nextln: [RexOp1call_r#20ff,%rax] v3 = call_indirect sig0, v2(v1)
; nextln: [RexOp1adjustsp#8029] adjust_sp_down v3
; nextln: [RexOp1adjustsp_id#8081] adjust_sp_up_imm 0x0004_93e0
; nextln: [RexOp1popq#58,%rbp] v4 = x86_pop.i64
; nextln: [Op1ret#c3] return v4
; nextln: }

75
cranelift/filetests/isa/x86/probestack-size.cton Normal file
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@@ -0,0 +1,75 @@
test compile
set is_64bit=1
set colocated_libcalls=1
set probestack_size_log2=13
isa x86
; Like %big in probestack.cton, but now the probestack size is bigger
; and it no longer needs a probe.
function %big() system_v {
ss0 = explicit_slot 4097
ebb0:
return
}
; check: function %big(i64 fp [%rbp]) -> i64 fp [%rbp] system_v {
; nextln: ss0 = explicit_slot 4097, offset -4113
; nextln: ss1 = incoming_arg 16, offset -16
; nextln:
; nextln: ebb0(v0: i64 [%rbp]):
; nextln: [RexOp1pushq#50] x86_push v0
; nextln: [RexOp1copysp#8089] copy_special %rsp -> %rbp
; nextln: [RexOp1adjustsp_id#d081] adjust_sp_down_imm 4112
; nextln: [RexOp1adjustsp_id#8081] adjust_sp_up_imm 4112
; nextln: [RexOp1popq#58,%rbp] v1 = x86_pop.i64
; nextln: [Op1ret#c3] return v1
; nextln: }
; Like %big; still doesn't need a probe.
function %bigger() system_v {
ss0 = explicit_slot 8192
ebb0:
return
}
; check: function %bigger(i64 fp [%rbp]) -> i64 fp [%rbp] system_v {
; nextln: ss0 = explicit_slot 8192, offset -8208
; nextln: ss1 = incoming_arg 16, offset -16
; nextln:
; nextln: ebb0(v0: i64 [%rbp]):
; nextln: [RexOp1pushq#50] x86_push v0
; nextln: [RexOp1copysp#8089] copy_special %rsp -> %rbp
; nextln: [RexOp1adjustsp_id#d081] adjust_sp_down_imm 8192
; nextln: [RexOp1adjustsp_id#8081] adjust_sp_up_imm 8192
; nextln: [RexOp1popq#58,%rbp] v1 = x86_pop.i64
; nextln: [Op1ret#c3] return v1
; nextln: }
; Like %bigger; this needs a probe.
function %biggest() system_v {
ss0 = explicit_slot 8193
ebb0:
return
}
; check: function %biggest(i64 fp [%rbp]) -> i64 fp [%rbp] system_v {
; nextln: ss0 = explicit_slot 8193, offset -8209
; nextln: ss1 = incoming_arg 16, offset -16
; nextln: sig0 = (i64 [%rax]) -> i64 [%rax] probestack
; nextln: fn0 = colocated %Probestack sig0
; nextln:
; nextln: ebb0(v0: i64 [%rbp]):
; nextln: [RexOp1pushq#50] x86_push v0
; nextln: [RexOp1copysp#8089] copy_special %rsp -> %rbp
; nextln: [RexOp1pu_id#b8,%rax] v1 = iconst.i64 8208
; nextln: [Op1call_id#e8,%rax] v2 = call fn0(v1)
; nextln: [RexOp1adjustsp#8029] adjust_sp_down v2
; nextln: [RexOp1adjustsp_id#8081] adjust_sp_up_imm 8208
; nextln: [RexOp1popq#58,%rbp] v3 = x86_pop.i64
; nextln: [Op1ret#c3] return v3
; nextln: }

50
cranelift/filetests/isa/x86/probestack.cton Normal file
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@@ -0,0 +1,50 @@
test compile
set is_64bit=1
set colocated_libcalls=1
isa x86
; A function with a big stack frame. This should have a stack probe.
function %big() system_v {
ss0 = explicit_slot 4097
ebb0:
return
}
; check: function %big(i64 fp [%rbp]) -> i64 fp [%rbp] system_v {
; nextln: ss0 = explicit_slot 4097, offset -4113
; nextln: ss1 = incoming_arg 16, offset -16
; nextln: sig0 = (i64 [%rax]) -> i64 [%rax] probestack
; nextln: fn0 = colocated %Probestack sig0
; nextln:
; nextln: ebb0(v0: i64 [%rbp]):
; nextln: [RexOp1pushq#50] x86_push v0
; nextln: [RexOp1copysp#8089] copy_special %rsp -> %rbp
; nextln: [RexOp1pu_id#b8,%rax] v1 = iconst.i64 4112
; nextln: [Op1call_id#e8,%rax] v2 = call fn0(v1)
; nextln: [RexOp1adjustsp#8029] adjust_sp_down v2
; nextln: [RexOp1adjustsp_id#8081] adjust_sp_up_imm 4112
; nextln: [RexOp1popq#58,%rbp] v3 = x86_pop.i64
; nextln: [Op1ret#c3] return v3
; nextln: }
; A function with a small enough stack frame. This shouldn't have a stack probe.
function %small() system_v {
ss0 = explicit_slot 4096
ebb0:
return
}
; check: function %small(i64 fp [%rbp]) -> i64 fp [%rbp] system_v {
; nextln: ss0 = explicit_slot 4096, offset -4112
; nextln: ss1 = incoming_arg 16, offset -16
; nextln:
; nextln: ebb0(v0: i64 [%rbp]):
; nextln: [RexOp1pushq#50] x86_push v0
; nextln: [RexOp1copysp#8089] copy_special %rsp -> %rbp
; nextln: [RexOp1adjustsp_id#d081] adjust_sp_down_imm 4096
; nextln: [RexOp1adjustsp_id#8081] adjust_sp_up_imm 4096
; nextln: [RexOp1popq#58,%rbp] v1 = x86_pop.i64
; nextln: [Op1ret#c3] return v1
; nextln: }

12
cranelift/filetests/isa/x86/prologue-epilogue.cton
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@@ -36,8 +36,8 @@ ebb0:
; nextln: ebb0(v0: i64 [%rbp]):
; nextln: x86_push v0
; nextln: copy_special %rsp -> %rbp
; nextln: adjust_sp_imm -176
; nextln: adjust_sp_imm 176
; nextln: adjust_sp_down_imm 176
; nextln: adjust_sp_up_imm 176
; nextln: v1 = x86_pop.i64
; nextln: return v1
; nextln: }
@@ -109,7 +109,7 @@ ebb0(v0: i64, v1: i64):
; nextln: x86_push v18
; nextln: x86_push v19
; nextln: x86_push v20
; nextln: adjust_sp_imm -8
; nextln: adjust_sp_down_imm 8
; nextln: v2 = load.i32 v0
; nextln: v3 = load.i32 v0+8
; nextln: v4 = load.i32 v0+16
@@ -136,7 +136,7 @@ ebb0(v0: i64, v1: i64):
; nextln: store v12, v1+80
; nextln: store v13, v1+88
; nextln: store v14, v1+96
; nextln: adjust_sp_imm 8
; nextln: adjust_sp_up_imm 8
; nextln: v26 = x86_pop.i64
; nextln: v25 = x86_pop.i64
; nextln: v24 = x86_pop.i64
@@ -192,13 +192,13 @@ ebb0(v0: i64, v1: i64):
; nextln: x86_push v51
; nextln: x86_push v52
; nextln: x86_push v53
; nextln: adjust_sp_imm
; nextln: adjust_sp_down_imm
; check: spill
; check: fill
; check: adjust_sp_imm
; check: adjust_sp_up_imm
; nextln: v59 = x86_pop.i64
; nextln: v58 = x86_pop.i64
; nextln: v57 = x86_pop.i64

10
cranelift/filetests/postopt/basic.cton
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@@ -10,7 +10,7 @@ ebb0(v0: i32, v1: i32):
[Op1ret#c3] return v1
ebb1:
[Op1puid#b8,%rax] v8 = iconst.i32 3
[Op1pu_id#b8,%rax] v8 = iconst.i32 3
[Op1ret#c3] return v8
}
; sameln: function %br_icmp
@@ -34,7 +34,7 @@ ebb0(v0: i32, v1: i32):
[Op1ret#c3] return v1
ebb1:
[Op1puid#b8,%rax] v8 = iconst.i32 3
[Op1pu_id#b8,%rax] v8 = iconst.i32 3
[Op1ret#c3] return v8
}
; sameln: function %br_icmp_inverse
@@ -53,12 +53,12 @@ ebb1:
function %br_icmp_imm(i32, i32) -> i32 {
ebb0(v0: i32, v1: i32):
[Op1icsccib#7083] v2 = icmp_imm slt v0, 2
[Op1icscc_ib#7083] v2 = icmp_imm slt v0, 2
[Op1t8jccd_long#84] brz v2, ebb1
[Op1ret#c3] return v1
ebb1:
[Op1puid#b8,%rax] v8 = iconst.i32 3
[Op1pu_id#b8,%rax] v8 = iconst.i32 3
[Op1ret#c3] return v8
}
; sameln: function %br_icmp_imm
@@ -82,7 +82,7 @@ ebb0(v0: f32, v1: f32):
[Op1ret#c3] return v1
ebb1:
[Op1puid#b8,%rax] v18 = iconst.i32 0x40a8_0000
[Op1pu_id#b8,%rax] v18 = iconst.i32 0x40a8_0000
[Mp2frurm#56e,%xmm0] v8 = bitcast.f32 v18
[Op1ret#c3] return v8
}

34
cranelift/filetests/regalloc/coloring-227.cton
View File

@@ -7,8 +7,8 @@ function %pr227(i32 [%rdi], i32 [%rsi], i32 [%rdx], i32 [%rcx], i64 vmctx [%r8])
heap0 = static gv0, min 0, bound 0x0001_0000_0000, guard 0x8000_0000
ebb0(v0: i32, v1: i32, v2: i32, v3: i32, v4: i64):
@0001 [RexOp1puid#b8] v5 = iconst.i32 0
@0003 [RexOp1puid#b8] v6 = iconst.i32 0
@0001 [RexOp1pu_id#b8] v5 = iconst.i32 0
@0003 [RexOp1pu_id#b8] v6 = iconst.i32 0
@0005 [RexOp1tjccb#74] brz v6, ebb10
@0007 [RexOp1jmpb#eb] jump ebb3(v5, v5, v5, v5, v5, v5, v0, v1, v2, v3)
@@ -16,10 +16,10 @@ function %pr227(i32 [%rdi], i32 [%rsi], i32 [%rdx], i32 [%rcx], i64 vmctx [%r8])
@000b [RexOp1jmpb#eb] jump ebb6
ebb6:
@000d [RexOp1puid#b8] v8 = iconst.i32 0
@000d [RexOp1pu_id#b8] v8 = iconst.i32 0
@000f [RexOp1tjccb#75] brnz v8, ebb5
@0011 [RexOp1puid#b8] v9 = iconst.i32 0
@0015 [RexOp1puid#b8] v11 = iconst.i32 0
@0011 [RexOp1pu_id#b8] v9 = iconst.i32 0
@0015 [RexOp1pu_id#b8] v11 = iconst.i32 0
@0017 [RexOp1icscc#39] v12 = icmp.i32 eq v15, v11
@0017 [RexOp2urm_noflags#4b6] v13 = bint.i32 v12
@001a [RexOp1rr#21] v14 = band v9, v13
@@ -28,11 +28,11 @@ function %pr227(i32 [%rdi], i32 [%rsi], i32 [%rdx], i32 [%rcx], i64 vmctx [%r8])
ebb7:
@0020 [RexOp1tjccb#74] brz.i32 v17, ebb8
@0022 [RexOp1puid#b8] v18 = iconst.i32 0
@0022 [RexOp1pu_id#b8] v18 = iconst.i32 0
@0024 [RexOp1tjccb#74] brz v18, ebb9
@0028 [RexOp1puid#b8] v21 = iconst.i32 0
@0028 [RexOp1pu_id#b8] v21 = iconst.i32 0
@002a [RexOp1umr#89] v79 = uextend.i64 v5
@002a [RexOp1rib#8083] v80 = iadd_imm.i64 v4, 0
@002a [RexOp1r_ib#8083] v80 = iadd_imm.i64 v4, 0
@002a [RexOp1ld#808b] v81 = load.i64 v80
@002a [RexOp1rr#8001] v22 = iadd v81, v79
@002a [RexMp1st#189] istore16 v21, v22
@@ -42,8 +42,8 @@ function %pr227(i32 [%rdi], i32 [%rsi], i32 [%rdx], i32 [%rcx], i64 vmctx [%r8])
@002e [RexOp1jmpb#eb] jump ebb8
ebb8:
@0033 [RexOp1puid#b8] v27 = iconst.i32 3
@0035 [RexOp1puid#b8] v28 = iconst.i32 4
@0033 [RexOp1pu_id#b8] v27 = iconst.i32 3
@0035 [RexOp1pu_id#b8] v28 = iconst.i32 4
@003b [RexOp1rr#09] v35 = bor.i32 v31, v13
@003c [RexOp1tjccb#75] brnz v35, ebb15(v27)
@003c [RexOp1jmpb#eb] jump ebb15(v28)
@@ -58,25 +58,25 @@ function %pr227(i32 [%rdi], i32 [%rsi], i32 [%rdx], i32 [%rcx], i64 vmctx [%r8])
@0045 [RexOp1jmpb#eb] jump ebb2(v40, v47, v54, v61, v68, v75)
ebb10:
@0046 [RexOp1puid#b8] v43 = iconst.i32 0
@0046 [RexOp1pu_id#b8] v43 = iconst.i32 0
@0048 [RexOp1jmpb#eb] jump ebb2(v43, v5, v0, v1, v2, v3)
ebb2(v7: i32, v45: i32, v52: i32, v59: i32, v66: i32, v73: i32):
@004c [RexOp1puid#b8] v44 = iconst.i32 0
@004c [RexOp1pu_id#b8] v44 = iconst.i32 0
@004e [RexOp1tjccb#74] brz v44, ebb12
@0052 [RexOp1puid#b8] v50 = iconst.i32 11
@0052 [RexOp1pu_id#b8] v50 = iconst.i32 11
@0054 [RexOp1tjccb#74] brz v50, ebb14
@0058 [RexOp1umr#89] v82 = uextend.i64 v52
@0058 [RexOp1rib#8083] v83 = iadd_imm.i64 v4, 0
@0058 [RexOp1r_ib#8083] v83 = iadd_imm.i64 v4, 0
@0058 [RexOp1ld#808b] v84 = load.i64 v83
@0058 [RexOp1rr#8001] v57 = iadd v84, v82
@0058 [RexOp1ld#8b] v58 = load.i32 v57
@005d [RexOp1umr#89] v85 = uextend.i64 v58
@005d [RexOp1rib#8083] v86 = iadd_imm.i64 v4, 0
@005d [RexOp1r_ib#8083] v86 = iadd_imm.i64 v4, 0
@005d [RexOp1ld#808b] v87 = load.i64 v86
@005d [RexOp1rr#8001] v64 = iadd v87, v85
@005d [RexOp1st#88] istore8 v59, v64
@0060 [RexOp1puid#b8] v65 = iconst.i32 0
@0060 [RexOp1pu_id#b8] v65 = iconst.i32 0
@0062 [RexOp1jmpb#eb] jump ebb13(v65)
ebb14:
@@ -84,7 +84,7 @@ function %pr227(i32 [%rdi], i32 [%rsi], i32 [%rdx], i32 [%rcx], i64 vmctx [%r8])
ebb13(v51: i32):
@0066 [RexOp1umr#89] v88 = uextend.i64 v45
@0066 [RexOp1rib#8083] v89 = iadd_imm.i64 v4, 0
@0066 [RexOp1r_ib#8083] v89 = iadd_imm.i64 v4, 0
@0066 [RexOp1ld#808b] v90 = load.i64 v89
@0066 [RexOp1rr#8001] v71 = iadd v90, v88
@0066 [RexOp1st#89] store v51, v71

1
cranelift/filetests/regalloc/unreachable_code.cton
View File

@@ -2,6 +2,7 @@
test compile
set is_64bit
set probestack_enabled=0
isa x86 haswell
; This function contains unreachable blocks which trip up the register