From 39e69ff565e0cded242b9d3631ca6f4b493aae21 Mon Sep 17 00:00:00 2001
From: Jakob Stoklund Olesen <jolesen@mozilla.com>
Date: Mon, 8 May 2017 12:44:22 -0700
Subject: [PATCH] Add constraint summaries to RecipeConstraints.

Most instructions don't have any fixed register constraints. Add boolean
summaries that can be used to check if it is worthwhile to scan the
constraint lists when looking for a fixed register constraint.

Also add a tied_ops summary bool which indicates that the instruction
has tied operand constraints.
---
 lib/cretonne/meta/gen_encoding.py   | 9 +++++++++
 lib/cretonne/src/isa/constraints.rs | 9 +++++++++
 2 files changed, 18 insertions(+)

diff --git a/lib/cretonne/meta/gen_encoding.py b/lib/cretonne/meta/gen_encoding.py
index f19377b8bd..c56db8fc79 100644
--- a/lib/cretonne/meta/gen_encoding.py
+++ b/lib/cretonne/meta/gen_encoding.py
@@ -474,6 +474,15 @@ def emit_recipe_constraints(isa, fmt):
             with fmt.indented('RecipeConstraints {', '},'):
                 emit_operand_constraints(r, r.ins, 'ins', tied_i2o, fmt)
                 emit_operand_constraints(r, r.outs, 'outs', tied_o2i, fmt)
+                fmt.format(
+                        'fixed_ins: {},',
+                        str(any(isinstance(c, Register)
+                            for c in r.ins)).lower())
+                fmt.format(
+                        'fixed_outs: {},',
+                        str(any(isinstance(c, Register)
+                            for c in r.outs)).lower())
+                fmt.format('tied_ops: {},', str(bool(tied_i2o)).lower())
 
 
 def emit_operand_constraints(
diff --git a/lib/cretonne/src/isa/constraints.rs b/lib/cretonne/src/isa/constraints.rs
index fa30fd24fe..e38b044535 100644
--- a/lib/cretonne/src/isa/constraints.rs
+++ b/lib/cretonne/src/isa/constraints.rs
@@ -67,6 +67,15 @@ pub struct RecipeConstraints {
     /// If the instruction produces a variable number of results, it's probably a call and the
     /// constraints must be derived from the calling convention ABI.
     pub outs: &'static [OperandConstraint],
+
+    /// Are any of the input constraints `FixedReg`?
+    pub fixed_ins: bool,
+
+    /// Are any of the output constraints `FixedReg`?
+    pub fixed_outs: bool,
+
+    /// Are there any tied operands?
+    pub tied_ops: bool,
 }
 
 /// Constraints on the range of a branch instruction.