Add conditional branch encodings for RISC-V.

Not all br_icmp opcodes are present in the ISA. The missing ones can be reached by commuting operands. Don't attempt to encode EBB offsets yet. For now just emit an EBB relocation for the branch instruction.
2017-04-03 15:07:08 -07:00
parent d2ddc700a8
commit 39e102b155
9 changed files with 124 additions and 12 deletions
--- a/test-all.sh
+++ b/test-all.sh
@@ -56,7 +56,7 @@ fi
 if [ -n "$needcheck" ]; then
    banner $(python --version 2>&1)
    $topdir/lib/cretonne/meta/check.sh
-    touch $tsfile
+    touch $tsfile || echo no target directory
 fi

 PKGS="cretonne cretonne-reader cretonne-tools filecheck"