Add an isa/encoding module.

Define data types for the level 1 and level 2 hash tables. These data types are
generic over the offset integer type so they can be twice as compact for
typically small ISAs.

Use these new types when generating encoding hash tables.

Emit both level 1 and level 2 hash tables.

Define generic functions that perform lookups in the encoding tables.

Implement the TargetIsa::encode() method for RISC-V using these building
blocks.

src/libcretonne/isa/mod.rs

@@ -41,9 +41,10 @@
 //! concurrent function compilations.
 
 pub mod riscv;
+mod encoding;
 
 use settings;
-use ir::{Inst, DataFlowGraph};
+use ir::{InstructionData, DataFlowGraph};
 
 /// Look for a supported ISA with the given `name`.
 /// Return a builder that can create a corresponding `TargetIsa`.
@@ -91,7 +92,7 @@ pub trait TargetIsa {
     /// Otherwise, return `None`.
     ///
     /// This is also the main entry point for determining if an instruction is legal.
-    fn encode(&self, dfg: &DataFlowGraph, inst: &Inst) -> Option<Encoding>;
+    fn encode(&self, dfg: &DataFlowGraph, inst: &InstructionData) -> Option<Encoding>;
 }
 
 /// Bits needed to encode an instruction as binary machine code.