Merge pull request #3362 from dheaton-arm/implement-unarrow
Implement `Unarrow`, `Uunarrow`, and `Snarrow` for the interpreter
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@@ -4047,7 +4047,7 @@ pub(crate) fn define(
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Combine `x` and `y` into a vector with twice the lanes but half the integer width while
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saturating overflowing values to the unsigned maximum and minimum.
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Note that all input lanes are considered unsigned.
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Note that all input lanes are considered unsigned: any negative values will be interpreted as unsigned, overflowing and being replaced with the unsigned maximum.
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The lanes will be concatenated after narrowing. For example, when `x` and `y` are `i32x4`
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and `x = [x3, x2, x1, x0]` and `y = [y3, y2, y1, y0]`, then after narrowing the value
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@@ -79,6 +79,30 @@ impl Type {
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}
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}
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/// Get the (minimum, maximum) values represented by each lane in the type.
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/// Note that these are returned as unsigned 'bit patterns'.
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pub fn bounds(self, signed: bool) -> (u128, u128) {
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if signed {
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match self.lane_type() {
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I8 => (i8::MIN as u128, i8::MAX as u128),
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I16 => (i16::MIN as u128, i16::MAX as u128),
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I32 => (i32::MIN as u128, i32::MAX as u128),
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I64 => (i64::MIN as u128, i64::MAX as u128),
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I128 => (i128::MIN as u128, i128::MAX as u128),
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_ => unimplemented!(),
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}
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} else {
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match self.lane_type() {
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I8 => (u8::MIN as u128, u8::MAX as u128),
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I16 => (u16::MIN as u128, u16::MAX as u128),
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I32 => (u32::MIN as u128, u32::MAX as u128),
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I64 => (u64::MIN as u128, u64::MAX as u128),
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I128 => (u128::MIN, u128::MAX),
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_ => unimplemented!(),
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}
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}
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}
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/// Get an integer type with the requested number of bits.
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pub fn int(bits: u16) -> Option<Self> {
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match bits {
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