riscv64: Move is_null/is_invalid to ISLE (#5874)

* riscv64: Move `is_null`/`is_invalid` to ISLE

* riscv64: Fix `is_invalid` codegen

* Implement review suggestions

Thanks!

Co-authored-by: Jamey Sharp <jamey@minilop.net>

---------

Co-authored-by: Jamey Sharp <jamey@minilop.net>

cranelift/filetests/filetests/isa/riscv64/reftypes.clif

@@ -23,15 +23,12 @@ block0(v0: r64):
 
 ; VCode:
 ; block0:
-;   is_null a0,a0
+;   seqz a0,a0
 ;   ret
 ; 
 ; Disassembled:
 ; block0: ; offset 0x0
-;   beq zero, a0, 0xc
-;   mv a0, zero
-;   j 8
-;   addi a0, zero, 1
+;   seqz a0, a0
 ;   ret
 
 function %f2(r64) -> i8 {
@@ -42,15 +39,14 @@ block0(v0: r64):
 
 ; VCode:
 ; block0:
-;   is_invalid a0,a0
+;   addi t2,a0,1
+;   seqz a0,t2
 ;   ret
 ; 
 ; Disassembled:
 ; block0: ; offset 0x0
-;   beq zero, a0, 0xc
-;   mv a0, zero
-;   j 8
-;   addi a0, zero, 1
+;   addi t2, a0, 1
+;   seqz a0, t2
 ;   ret
 
 function %f3() -> r64 {

cranelift/filetests/filetests/runtests/bitcast-ref64.clif

@@ -2,6 +2,7 @@ test run
 target aarch64
 target x86_64
 target s390x
+target riscv64gc
 ; the interpreter does not support bitcasting to/from references
 
 function %bitcast_ir64(i64) -> i8 {

cranelift/filetests/filetests/runtests/ref64-invalid-null.clif

@@ -3,6 +3,7 @@ test run
 target aarch64
 target x86_64
 target s390x
+target riscv64gc
 
 function %is_null_true_r64() -> i8 {
 block0: