Add ISA-dependent settings for RISC-V.

src/libcretonne/isa/riscv/mod.rs

@@ -1 +1,3 @@
 //! RISC-V Instruction Set Architecture.
+
+pub mod settings;

src/libcretonne/isa/riscv/settings.rs

@@ -0,0 +1,5 @@
+//! RISC-V Settings.
+
+// Include code generated by `meta/gen_settings.py`. This file contains a public `Settings` struct
+// with an impl for all of the settings defined in `meta/cretonne/settings.py`.
+include!(concat!(env!("OUT_DIR"), "/settings-riscv.rs"));