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Intel encodings for floating point bitwise ops.

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band, bor, bxor, band_not are all available on XMM registers.
This commit is contained in:
Jakob Stoklund Olesen
2017-07-20 11:45:06 -07:00
parent a42eaa77b4
commit 35cbe68a70
3 changed files with 111 additions and 5 deletions
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16
lib/cretonne/meta/isa/intel/encodings.py
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@@ -224,7 +224,7 @@ I64.enc(base.fcvt_from_sint.f64.i32, *r.furm.rex(0xf2, 0x0f, 0x2A))
I64.enc(base.fcvt_from_sint.f64.i32, *r.furm(0xf2, 0x0f, 0x2A))
# Binary arithmetic ops.
for inst, opc in [
for inst, opc in [
(base.fadd, 0x58),
(base.fsub, 0x5c),
(base.fmul, 0x59),
@@ -236,3 +236,17 @@ for inst, opc in [
I32.enc(inst.f64, *r.frm(0xf2, 0x0f, opc))
I64.enc(inst.f64, *r.frm.rex(0xf2, 0x0f, opc))
I64.enc(inst.f64, *r.frm(0xf2, 0x0f, opc))
# Binary bitwise ops.
for inst, opc in [
(base.band, 0x54),
(base.band_not, 0x55),
(base.bor, 0x56),
(base.bxor, 0x57)]:
I32.enc(inst.f32, *r.frm(0x0f, opc))
I64.enc(inst.f32, *r.frm.rex(0x0f, opc))
I64.enc(inst.f32, *r.frm(0x0f, opc))
I32.enc(inst.f64, *r.frm(0x0f, opc))
I64.enc(inst.f64, *r.frm.rex(0x0f, opc))
I64.enc(inst.f64, *r.frm(0x0f, opc))