Cranelift: fix use of pinned reg with SysV calling convention. (#4176)

Previously, the pinned register (enabled by the `enable_pinned_reg`
Cranelift setting and used via the `get_pinned_reg` and `set_pinned_reg`
CLIF ops) was only used when Cranelift was embedded in SpiderMonkey, in
order to support a pinned heap register. SpiderMonkey has its own
calling convention in Cranelift (named after the integration layer,
"Baldrdash").

However, the feature is more general, and should be usable with the
default system calling convention too, e.g. SysV or Windows Fastcall.

This PR fixes the ABI code to properly treat the pinned register as a
globally allocated register -- and hence an implicit input and output to
every function, not saved/restored in the prologue/epilogue -- for SysV
on x86-64 and aarch64, and Fastcall on x86-64.

Fixes #4170.

cranelift/filetests/filetests/isa/aarch64/pinned-reg.clif

@@ -0,0 +1,16 @@
+test compile precise-output
+set enable_pinned_reg=true
+target aarch64
+
+function %f0() {
+block0:
+    v1 = get_pinned_reg.i64
+    v2 = iadd_imm v1, 1
+    set_pinned_reg v2
+    return
+}
+
+; block0:
+;   add x21, x21, #1
+;   ret
+

cranelift/filetests/filetests/isa/x64/pinned-reg.clif

@@ -0,0 +1,36 @@
+test compile precise-output
+set enable_pinned_reg=true
+target x86_64
+
+function %f0() {
+block0:
+    v1 = get_pinned_reg.i64
+    v2 = iadd_imm v1, 1
+    set_pinned_reg v2
+    return
+}
+
+;   pushq   %rbp
+;   movq    %rsp, %rbp
+; block0:
+;   addq    %r15, $1, %r15
+;   movq    %rbp, %rsp
+;   popq    %rbp
+;   ret
+
+function %f1() windows_fastcall {
+block0:
+    v1 = get_pinned_reg.i64
+    v2 = iadd_imm v1, 1
+    set_pinned_reg v2
+    return
+}
+
+;   pushq   %rbp
+;   movq    %rsp, %rbp
+; block0:
+;   addq    %r15, $1, %r15
+;   movq    %rbp, %rsp
+;   popq    %rbp
+;   ret
+