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fuzzgen: Add srem/urem (#5476)

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This commit is contained in:
Afonso Bordado
2022-12-20 00:39:33 +00:00
committed by GitHub
parent 962a911163
commit 307945877e
1 changed files with 22 additions and 0 deletions
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22
cranelift/fuzzgen/src/function_generator.rs
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@@ -304,6 +304,28 @@ const OPCODE_SIGNATURES: &'static [(
// aarch64: https://github.com/bytecodealliance/wasmtime/issues/4864
#[cfg(not(any(target_arch = "x86_64", target_arch = "aarch64")))]
(Opcode::Sdiv, &[I128, I128], &[I128], insert_opcode),
// Urem
(Opcode::Urem, &[I8, I8], &[I8], insert_opcode),
(Opcode::Urem, &[I16, I16], &[I16], insert_opcode),
(Opcode::Urem, &[I32, I32], &[I32], insert_opcode),
(Opcode::Urem, &[I64, I64], &[I64], insert_opcode),
// urem.i128 not implemented in some backends:
// x64: https://github.com/bytecodealliance/wasmtime/issues/5474
// aarch64: https://github.com/bytecodealliance/wasmtime/issues/5472
#[cfg(not(any(target_arch = "x86_64", target_arch = "aarch64")))]
(Opcode::Urem, &[I128, I128], &[I128], insert_opcode),
// Srem
// Issues on x64: https://github.com/bytecodealliance/wasmtime/issues/5470
#[cfg(not(target_arch = "x86_64"))]
(Opcode::Srem, &[I8, I8], &[I8], insert_opcode),
(Opcode::Srem, &[I16, I16], &[I16], insert_opcode),
(Opcode::Srem, &[I32, I32], &[I32], insert_opcode),
(Opcode::Srem, &[I64, I64], &[I64], insert_opcode),
// srem.i128 not implemented in some backends:
// x64: https://github.com/bytecodealliance/wasmtime/issues/5474
// aarch64: https://github.com/bytecodealliance/wasmtime/issues/5472
#[cfg(not(any(target_arch = "x86_64", target_arch = "aarch64")))]
(Opcode::Srem, &[I128, I128], &[I128], insert_opcode),
// Ineg
(Opcode::Ineg, &[I8, I8], &[I8], insert_opcode),
(Opcode::Ineg, &[I16, I16], &[I16], insert_opcode),