Begin an Intel-specific instruction group.
Add instructions representing Intel's division instructions which use a numerator that is twice as wide as the denominator and produce both the quotient and remainder. Add encodings for the x86_[su]divmodx instructions.
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@@ -154,6 +154,21 @@ ebb0:
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; asm: imulq %rcx, %r10
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[-,%r10] v122 = imul v3, v1 ; bin: 4c 0f af d1
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[-,%rax] v130 = iconst.i64 1
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[-,%rdx] v131 = iconst.i64 2
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; asm: idivq %rcx
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[-,%rax,%rdx] v132, v133 = x86_sdivmodx v130, v131, v1 ; bin: 48 f7 f9
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; asm: idivq %rsi
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[-,%rax,%rdx] v134, v135 = x86_sdivmodx v130, v131, v2 ; bin: 48 f7 fe
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; asm: idivq %r10
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[-,%rax,%rdx] v136, v137 = x86_sdivmodx v130, v131, v3 ; bin: 49 f7 fa
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; asm: divq %rcx
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[-,%rax,%rdx] v138, v139 = x86_udivmodx v130, v131, v1 ; bin: 48 f7 f1
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; asm: divq %rsi
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[-,%rax,%rdx] v140, v141 = x86_udivmodx v130, v131, v2 ; bin: 48 f7 f6
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; asm: divq %r10
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[-,%rax,%rdx] v142, v143 = x86_udivmodx v130, v131, v3 ; bin: 49 f7 f2
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; Bit-counting instructions.
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; asm: popcntq %rsi, %rcx
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@@ -331,6 +346,21 @@ ebb0:
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; asm: imull %ecx, %r10d
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[-,%r10] v122 = imul v3, v1 ; bin: 44 0f af d1
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[-,%rax] v130 = iconst.i32 1
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[-,%rdx] v131 = iconst.i32 2
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; asm: idivl %rcx
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[-,%rax,%rdx] v132, v133 = x86_sdivmodx v130, v131, v1 ; bin: 40 f7 f9
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; asm: idivl %rsi
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[-,%rax,%rdx] v134, v135 = x86_sdivmodx v130, v131, v2 ; bin: 40 f7 fe
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; asm: idivl %r10d
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[-,%rax,%rdx] v136, v137 = x86_sdivmodx v130, v131, v3 ; bin: 41 f7 fa
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; asm: divl %rcx
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[-,%rax,%rdx] v138, v139 = x86_udivmodx v130, v131, v1 ; bin: 40 f7 f1
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; asm: divl %rsi
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[-,%rax,%rdx] v140, v141 = x86_udivmodx v130, v131, v2 ; bin: 40 f7 f6
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; asm: divl %r10d
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[-,%rax,%rdx] v142, v143 = x86_udivmodx v130, v131, v3 ; bin: 41 f7 f2
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; Bit-counting instructions.
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; asm: popcntl %esi, %ecx
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