Add serde serialization support for the full clif ir

cranelift/codegen/src/regalloc/diversion.rs

@@ -15,6 +15,9 @@ use crate::isa::{RegInfo, RegUnit};
 use core::fmt;
 use cranelift_entity::{SparseMap, SparseMapValue};
 
+#[cfg(feature = "enable-serde")]
+use serde::{Deserialize, Serialize};
+
 /// A diversion of a value from its original location to a new register or stack location.
 ///
 /// In IR, a diversion is represented by a `regmove` instruction, possibly a chain of them for the
@@ -23,6 +26,7 @@ use cranelift_entity::{SparseMap, SparseMapValue};
 /// When tracking diversions, the `from` field is the original assigned value location, and `to` is
 /// the current one.
 #[derive(Clone, Copy, Debug, PartialEq, Eq)]
+#[cfg_attr(feature = "enable-serde", derive(Serialize, Deserialize))]
 pub struct Diversion {
     /// The original value location.
     pub from: ValueLoc,
@@ -40,18 +44,21 @@ impl Diversion {
 
 /// Keep track of diversions in a block.
 #[derive(Clone)]
+#[cfg_attr(feature = "enable-serde", derive(Serialize, Deserialize))]
 pub struct RegDiversions {
     current: FxHashMap<Value, Diversion>,
 }
 
 /// Keep track of diversions at the entry of block.
 #[derive(Clone)]
+#[cfg_attr(feature = "enable-serde", derive(Serialize, Deserialize))]
 struct EntryRegDiversionsValue {
     key: Block,
     divert: RegDiversions,
 }
 
 /// Map block to their matching RegDiversions at basic blocks entry.
+#[cfg_attr(feature = "enable-serde", derive(Serialize, Deserialize))]
 pub struct EntryRegDiversions {
     map: SparseMap<Block, EntryRegDiversionsValue>,
 }