Add serde serialization support for the full clif ir
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@@ -6,6 +6,9 @@ use crate::isa::constraints::{BranchRange, RecipeConstraints};
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use crate::regalloc::RegDiversions;
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use core::fmt;
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#[cfg(feature = "enable-serde")]
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use serde::{Deserialize, Serialize};
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/// Bits needed to encode an instruction as binary machine code.
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///
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/// The encoding consists of two parts, both specific to the target ISA: An encoding *recipe*, and
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@@ -13,6 +16,7 @@ use core::fmt;
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/// operands to encoded bits. The encoding bits provide additional information to the recipe,
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/// typically parts of the opcode.
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#[derive(Clone, Copy, Debug, PartialEq, Eq)]
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#[cfg_attr(feature = "enable-serde", derive(Serialize, Deserialize))]
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pub struct Encoding {
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recipe: u16,
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bits: u16,
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