From 2f58c371bc0d9beb53b81c0ba097dd62c5ef5771 Mon Sep 17 00:00:00 2001 From: Jakob Stoklund Olesen Date: Wed, 21 Feb 2018 12:06:58 -0800 Subject: [PATCH] Make specific ISA sub-modules private. We don't want ISA-specific details exposed in the public Cretonne APIs. --- lib/cretonne/meta/gen_settings.py | 1 + lib/cretonne/src/isa/mod.rs | 8 ++++---- 2 files changed, 5 insertions(+), 4 deletions(-) diff --git a/lib/cretonne/meta/gen_settings.py b/lib/cretonne/meta/gen_settings.py index 693b7baa76..0cd4e0e860 100644 --- a/lib/cretonne/meta/gen_settings.py +++ b/lib/cretonne/meta/gen_settings.py @@ -86,6 +86,7 @@ def gen_getters(sgrp, fmt): Emit getter functions for all the settings in fmt. """ fmt.doc_comment("User-defined settings.") + fmt.line('#[allow(dead_code)]') with fmt.indented('impl Flags {', '}'): fmt.doc_comment('Get a view of the boolean predicates.') with fmt.indented( diff --git a/lib/cretonne/src/isa/mod.rs b/lib/cretonne/src/isa/mod.rs index f1ebf39a77..38164e5167 100644 --- a/lib/cretonne/src/isa/mod.rs +++ b/lib/cretonne/src/isa/mod.rs @@ -56,16 +56,16 @@ use isa::enc_tables::Encodings; use std::fmt; #[cfg(build_riscv)] -pub mod riscv; +mod riscv; #[cfg(build_intel)] -pub mod intel; +mod intel; #[cfg(build_arm32)] -pub mod arm32; +mod arm32; #[cfg(build_arm64)] -pub mod arm64; +mod arm64; pub mod registers; mod encoding;