diff --git a/cranelift/codegen/meta/src/shared/instructions.rs b/cranelift/codegen/meta/src/shared/instructions.rs index 955782039d..0bbaa2907b 100644 --- a/cranelift/codegen/meta/src/shared/instructions.rs +++ b/cranelift/codegen/meta/src/shared/instructions.rs @@ -2469,8 +2469,7 @@ pub(crate) fn define( Signed integer multiplication, producing the high half of a double-length result. - Polymorphic over all scalar integer types, but does not support vector - types. + Polymorphic over all integer types (vector and scalar). "#, &formats.binary, ) diff --git a/cranelift/filetests/filetests/runtests/simd-smulhi.clif b/cranelift/filetests/filetests/runtests/simd-smulhi.clif new file mode 100644 index 0000000000..5fc0445bb4 --- /dev/null +++ b/cranelift/filetests/filetests/runtests/simd-smulhi.clif @@ -0,0 +1,30 @@ +test interpret +; The AArch64 and x86_64 backends only support scalar values. + +function %smulhi_i8x16(i8x16, i8x16) -> i8x16 { +block0(v0: i8x16, v1: i8x16): + v2 = smulhi v0, v1 + return v2 +} +; run: %smulhi_i8x16([1 -2 3 -4 5 -6 7 -8 127 127 127 127 -128 -128 -128 -128], [9 10 -11 -12 13 14 -15 -16 17 18 -19 -20 21 22 -128 127]) == [0 -1 -1 0 0 -1 -1 0 8 8 -10 -10 -11 -11 64 -64] + +function %smulhi_i16x8(i16x8, i16x8) -> i16x8 { +block0(v0: i16x8, v1: i16x8): + v2 = smulhi v0, v1 + return v2 +} +; run: %smulhi_i16x8([1 -2 255 -255 255 -255 32767 -32768], [3 4 -5 -6 7 8 -32768 -32768]) == [0 -1 -1 0 0 -1 -16384 16384] + +function %smulhi_i32x4(i32x4, i32x4) -> i32x4 { +block0(v0: i32x4, v1: i32x4): + v2 = smulhi v0, v1 + return v2 +} +; run: %smulhi_i32x4([1 -255 65535 -2147483648], [2 65535 -2147483647 -2147483647]) == [0 -1 -32768 1073741823] + +function %smulhi_i64x2(i64x2, i64x2) -> i64x2 { +block0(v0: i64x2, v1: i64x2): + v2 = smulhi v0, v1 + return v2 +} +; run: %smulhi_i64x2([-1 9223372036854775807], [-2 -9223372036854775808]) == [0 -4611686018427387904] \ No newline at end of file diff --git a/cranelift/filetests/filetests/runtests/smulhi-aarch64.clif b/cranelift/filetests/filetests/runtests/smulhi-aarch64.clif new file mode 100644 index 0000000000..b123f2f0c9 --- /dev/null +++ b/cranelift/filetests/filetests/runtests/smulhi-aarch64.clif @@ -0,0 +1,13 @@ +test interpret +test run +target aarch64 +; x86_64 backend only supports `i16`, `i32`, and `i64` types. + +function %smulhi_i8(i8, i8) -> i8 { +block0(v0: i8, v1: i8): + v2 = smulhi v0, v1 + return v2 +} +; run: %smulhi_i8(-2, -4) == 0 +; run: %smulhi_i8(2, -4) == -1 +; run: %smulhi_i8(127, 127) == 63 \ No newline at end of file diff --git a/cranelift/filetests/filetests/runtests/smulhi.clif b/cranelift/filetests/filetests/runtests/smulhi.clif new file mode 100644 index 0000000000..b2fe1072ed --- /dev/null +++ b/cranelift/filetests/filetests/runtests/smulhi.clif @@ -0,0 +1,32 @@ +test interpret +test run +target aarch64 +set enable_simd +target x86_64 machinst + +function %smulhi_i16(i16, i16) -> i16 { +block0(v0: i16, v1: i16): + v2 = smulhi v0, v1 + return v2 +} +; run: %smulhi_i16(-2, -4) == 0 +; run: %smulhi_i16(2, -4) == -1 +; run: %smulhi_i16(32767, 32767) == 16383 + +function %smulhi_i32(i32, i32) -> i32 { +block0(v0: i32, v1: i32): + v2 = smulhi v0, v1 + return v2 +} +; run: %smulhi_i32(-500, -700) == 0 +; run: %smulhi_i32(500, -700) == -1 +; run: %smulhi_i32(2147483647, 2147483647) == 1073741823 + +function %smulhi_i64(i64, i64) -> i64 { +block0(v0: i64, v1: i64): + v2 = smulhi v0, v1 + return v2 +} +; run: %smulhi_i64(-4294967295, -4294967295) == 0 +; run: %smulhi_i64(4294967295, -4294967295) == -1 +; run: %smulhi_i64(9223372036854775807, 9223372036854775807) == 4611686018427387903 diff --git a/cranelift/interpreter/src/step.rs b/cranelift/interpreter/src/step.rs index 25ec8b2878..cff3c32f2a 100644 --- a/cranelift/interpreter/src/step.rs +++ b/cranelift/interpreter/src/step.rs @@ -553,15 +553,20 @@ where Opcode::Ineg => binary(Value::sub, Value::int(0, ctrl_ty)?, arg(0)?)?, Opcode::Iabs => unimplemented!("Iabs"), Opcode::Imul => binary(Value::mul, arg(0)?, arg(1)?)?, - Opcode::Umulhi => { + Opcode::Umulhi | Opcode::Smulhi => { + let double_length = match ctrl_ty.lane_bits() { + 8 => types::I16, + 16 => types::I32, + 32 => types::I64, + 64 => types::I128, + _ => unimplemented!("Unsupported integer length {}", ctrl_ty.bits()), + }; + let conv_type = if inst.opcode() == Opcode::Umulhi { + ValueConversionKind::ZeroExtend(double_length) + } else { + ValueConversionKind::SignExtend(double_length) + }; if ctrl_ty.is_vector() { - let double_length = match ctrl_ty.lane_bits() { - 8 => types::I16, - 16 => types::I32, - 32 => types::I64, - 64 => types::I128, - _ => unimplemented!("Unsupported integer length {}", ctrl_ty.bits()), - }; let arg0 = extractlanes(&arg(0)?, ctrl_ty.lane_type())?; let arg1 = extractlanes(&arg(1)?, ctrl_ty.lane_type())?; @@ -569,8 +574,8 @@ where .into_iter() .zip(arg1) .map(|(x, y)| { - let x = x.convert(ValueConversionKind::ZeroExtend(double_length))?; - let y = y.convert(ValueConversionKind::ZeroExtend(double_length))?; + let x = x.convert(conv_type.clone())?; + let y = y.convert(conv_type.clone())?; Ok(Value::mul(x, y)? .convert(ValueConversionKind::ExtractUpper(ctrl_ty.lane_type()))?) @@ -579,30 +584,12 @@ where assign(vectorizelanes(&res, ctrl_ty)?) } else { - let double_length = match ctrl_ty.bits() { - 8 => types::I16, - 16 => types::I32, - 32 => types::I64, - 64 => types::I128, - _ => unimplemented!("Unsupported integer length {}", ctrl_ty.bits()), - }; - let x: V = Value::int( - arg(0)? - .convert(ValueConversionKind::ToUnsigned)? - .into_int()?, - double_length, - )?; - let y: V = Value::int( - arg(1)? - .convert(ValueConversionKind::ToUnsigned)? - .into_int()?, - double_length, - )?; + let x: V = arg(0)?.convert(conv_type.clone())?; + let y: V = arg(1)?.convert(conv_type.clone())?; let z = Value::mul(x, y)?.convert(ValueConversionKind::ExtractUpper(ctrl_ty))?; assign(z) } } - Opcode::Smulhi => unimplemented!("Smulhi"), Opcode::Udiv => binary_unsigned_can_trap(Value::div, arg(0)?, arg(1)?)?, Opcode::Sdiv => binary_can_trap(Value::div, arg(0)?, arg(1)?)?, Opcode::Urem => binary_unsigned_can_trap(Value::rem, arg(0)?, arg(1)?)?, diff --git a/cranelift/interpreter/src/value.rs b/cranelift/interpreter/src/value.rs index 768ccfe8e2..13d28d5156 100644 --- a/cranelift/interpreter/src/value.rs +++ b/cranelift/interpreter/src/value.rs @@ -308,6 +308,7 @@ impl Value for DataValue { (DataValue::I16(n), types::I32) => DataValue::I32(n as i32), (DataValue::I16(n), types::I64) => DataValue::I64(n as i64), (DataValue::I32(n), types::I64) => DataValue::I64(n as i64), + (DataValue::I64(n), types::I128) => DataValue::I128(n as i128), (dv, _) => unimplemented!("conversion: {} -> {:?}", dv.ty(), kind), }, ValueConversionKind::ZeroExtend(ty) => match (self, ty) {