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x64: Lower SIMD requirement to SSE4.1 from SSE4.2 (#6206)

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Cranelift only has one instruction SIMD which depends on SSE4.2 so this
commit adds a lowering rule for `pcmpgtq` which doesn't use SSE4.2 and
enables lowering the baseline requirement for SIMD support from SSE4.2
to SSE4.1.

The `has_sse42` setting is no longer enabled by default for Cranelift.
Additionally `enable_simd` no longer requires `has_sse42` on x64.
Finally the fuzz-generator for Wasmtime codegen settings now enables
flipping the `has_sse42` setting instead of unconditionally setting it
to `true`.

The specific lowering for `pcmpgtq` is copied from LLVM's lowering of
this instruction.
This commit is contained in:
Alex Crichton
2023-04-14 12:24:43 -05:00
committed by GitHub
parent 26f9ce02bc
commit 2d25db047f
8 changed files with 62 additions and 15 deletions
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6
crates/fuzzing/src/generators/codegen_settings.rs
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@@ -35,7 +35,7 @@ impl CodegenSettings {
}
}
/// Features such as sse4.2 are unconditionally enabled on the x86_64 target
/// Features such as sse3 are unconditionally enabled on the x86_64 target
/// because they are hard required for SIMD, but when SIMD is disabled, for
/// example, we support disabling these features.
///
@@ -57,7 +57,7 @@ impl CodegenSettings {
// to have test case failures unrelated to codegen setting input
// that fail on one architecture to fail on other architectures as
// well.
let new_flags = ["has_sse3", "has_ssse3", "has_sse41", "has_sse42"]
let new_flags = ["has_sse3", "has_ssse3", "has_sse41"]
.into_iter()
.map(|name| Ok((name, u.arbitrary()?)))
.collect::<arbitrary::Result<HashMap<_, bool>>>()?;
@@ -147,8 +147,8 @@ impl<'a> Arbitrary<'a> for CodegenSettings {
std:"sse3" => clif:"has_sse3" ratio: 1 in 1,
std:"ssse3" => clif:"has_ssse3" ratio: 1 in 1,
std:"sse4.1" => clif:"has_sse41" ratio: 1 in 1,
std:"sse4.2" => clif:"has_sse42" ratio: 1 in 1,
std:"sse4.2" => clif:"has_sse42",
std:"popcnt" => clif:"has_popcnt",
std:"avx" => clif:"has_avx",
std:"avx2" => clif:"has_avx2",