Add use declarations for std features.

Merge the `use` parts of the `no_std` branch. This reduces the diffs
between master and the `no_std` branch, making it easier to maintain.

Most of these changes are derived from patches by @lachlansneff in
https://github.com/Cretonne/cretonne/tree/no_std.

lib/cretonne/src/abi.rs

@@ -5,6 +5,7 @@
 
 use ir::{ArgumentLoc, AbiParam, ArgumentExtension, Type};
 use std::cmp::Ordering;
+use std::vec::Vec;
 
 /// Legalization action to perform on a single argument or return value when converting a
 /// signature.

lib/cretonne/src/bforest/map.rs

@@ -423,6 +423,7 @@ where
 #[cfg(test)]
 mod test {
     use std::mem;
+    use std::vec::Vec;
     use super::*;
     use super::super::NodeData;
 

lib/cretonne/src/bforest/node.rs

@@ -580,6 +580,7 @@ where
 #[cfg(test)]
 mod test {
     use std::mem;
+    use std::string::ToString;
     use super::*;
 
     // Forest impl for a set implementation.

lib/cretonne/src/bforest/pool.rs

@@ -78,6 +78,7 @@ impl<F: Forest> NodePool<F> {
     {
         use std::borrow::Borrow;
         use std::cmp::Ordering;
+        use std::vec::Vec;
         use super::Comparator;
         use entity::SparseSet;
 

lib/cretonne/src/bforest/set.rs

@@ -351,6 +351,7 @@ where
 #[cfg(test)]
 mod test {
     use std::mem;
+    use std::vec::Vec;
     use super::*;
     use super::super::NodeData;
 

lib/cretonne/src/dominator_tree.rs

@@ -8,8 +8,8 @@ use packed_option::PackedOption;
 use std::cmp;
 use std::mem;
 use timing;
-
 use std::cmp::Ordering;
+use std::vec::Vec;
 
 // RPO numbers are not first assigned in a contiguous way but as multiples of STRIDE, to leave
 // room for modifications of the dominator tree.

lib/cretonne/src/entity/list.rs

@@ -3,6 +3,7 @@ use entity::EntityRef;
 use std::hash::{Hash, Hasher};
 use std::marker::PhantomData;
 use std::mem;
+use std::vec::Vec;
 
 /// A small list of entity references allocated from a pool.
 ///

lib/cretonne/src/entity/map.rs

@@ -3,6 +3,7 @@
 use entity::{EntityRef, Keys};
 use std::marker::PhantomData;
 use std::ops::{Index, IndexMut};
+use std::vec::Vec;
 
 /// A mapping `K -> V` for densely indexed entity references.
 ///

lib/cretonne/src/entity/primary.rs

@@ -2,6 +2,7 @@
 use entity::{EntityRef, Keys};
 use std::marker::PhantomData;
 use std::ops::{Index, IndexMut};
+use std::vec::Vec;
 
 /// A primary mapping `K -> V` allocating dense entity references.
 ///

lib/cretonne/src/entity/set.rs

@@ -2,6 +2,7 @@
 
 use entity::{EntityRef, Keys};
 use std::marker::PhantomData;
+use std::vec::Vec;
 
 /// A set of `K` for densely indexed entity references.
 ///

lib/cretonne/src/entity/sparse.rs

@@ -11,6 +11,7 @@ use entity::{EntityRef, EntityMap};
 use std::mem;
 use std::slice;
 use std::u32;
+use std::vec::Vec;
 
 /// Trait for extracting keys from values stored in a `SparseMap`.
 ///

lib/cretonne/src/flowgraph.rs

@@ -204,6 +204,7 @@ mod tests {
     use super::*;
     use cursor::{Cursor, FuncCursor};
     use ir::{Function, InstBuilder, types};
+    use std::vec::Vec;
 
     #[test]
     fn empty() {

lib/cretonne/src/ir/condcodes.rs

@@ -266,6 +266,7 @@ impl FromStr for FloatCC {
 #[cfg(test)]
 mod tests {
     use super::*;
+    use std::string::ToString;
 
     static INT_ALL: [IntCC; 10] = [
         IntCC::Equal,

lib/cretonne/src/ir/dfg.rs

@@ -944,6 +944,7 @@ mod tests {
     use cursor::{Cursor, FuncCursor};
     use ir::types;
     use ir::{Function, Opcode, InstructionData, TrapCode};
+    use std::string::ToString;
 
     #[test]
     fn make_inst() {

lib/cretonne/src/ir/entities.rs

@@ -262,6 +262,7 @@ impl From<Heap> for AnyEntity {
 mod tests {
     use super::*;
     use std::u32;
+    use std::string::ToString;
 
     #[test]
     fn value_with_number() {

lib/cretonne/src/ir/extfunc.rs

@@ -10,6 +10,7 @@ use isa::{RegInfo, RegUnit};
 use std::cmp;
 use std::fmt;
 use std::str::FromStr;
+use std::vec::Vec;
 
 /// Function signature.
 ///
@@ -378,6 +379,7 @@ impl FromStr for CallConv {
 mod tests {
     use super::*;
     use ir::types::{I32, F32, B8};
+    use std::string::ToString;
 
     #[test]
     fn argument_type() {

lib/cretonne/src/ir/extname.rs

@@ -122,6 +122,7 @@ impl FromStr for ExternalName {
 mod tests {
     use super::ExternalName;
     use ir::LibCall;
+    use std::string::ToString;
 
     #[test]
     fn display_testcase() {

lib/cretonne/src/ir/immediates.rs

@@ -652,6 +652,7 @@ mod tests {
     use std::{f32, f64};
     use std::str::FromStr;
     use std::fmt::Display;
+    use std::string::ToString;
 
     #[test]
     fn format_imm64() {

lib/cretonne/src/ir/instructions.rs

@@ -9,6 +9,7 @@
 use std::fmt::{self, Display, Formatter};
 use std::str::FromStr;
 use std::ops::{Deref, DerefMut};
+use std::vec::Vec;
 
 use ir;
 use ir::{Value, Type, Ebb, JumpTable, SigRef, FuncRef};
@@ -537,6 +538,7 @@ pub enum ResolvedConstraint {
 #[cfg(test)]
 mod tests {
     use super::*;
+    use std::string::ToString;
 
     #[test]
     fn opcodes() {

lib/cretonne/src/ir/jumptable.rs

@@ -8,6 +8,7 @@ use ir::entities::Ebb;
 use std::iter;
 use std::slice;
 use std::fmt::{self, Display, Formatter};
+use std::vec::Vec;
 
 /// Contents of a jump table.
 ///
@@ -141,6 +142,8 @@ mod tests {
     use super::JumpTableData;
     use ir::Ebb;
     use entity::EntityRef;
+    use std::vec::Vec;
+    use std::string::ToString;
 
     #[test]
     fn empty() {

lib/cretonne/src/ir/layout.rs

@@ -743,6 +743,7 @@ mod tests {
     use entity::EntityRef;
     use ir::{Ebb, Inst, ProgramOrder, SourceLoc};
     use std::cmp::Ordering;
+    use std::vec::Vec;
 
     struct LayoutCursor<'f> {
         /// Borrowed function layout. Public so it can be re-borrowed from this cursor.

lib/cretonne/src/ir/libcall.rs

@@ -100,6 +100,7 @@ impl LibCall {
 #[cfg(test)]
 mod test {
     use super::*;
+    use std::string::ToString;
 
     #[test]
     fn display() {

lib/cretonne/src/ir/progpoint.rs

@@ -148,6 +148,7 @@ mod tests {
     use super::*;
     use entity::EntityRef;
     use ir::{Inst, Ebb};
+    use std::string::ToString;
 
     #[test]
     fn convert() {

lib/cretonne/src/ir/sourceloc.rs

@@ -51,6 +51,7 @@ impl fmt::Display for SourceLoc {
 #[cfg(test)]
 mod tests {
     use ir::SourceLoc;
+    use std::string::ToString;
 
     #[test]
     fn display() {

lib/cretonne/src/ir/stackslot.rs

@@ -10,6 +10,7 @@ use std::cmp;
 use std::fmt;
 use std::ops::{Index, IndexMut};
 use std::str::FromStr;
+use std::vec::Vec;
 
 /// The size of an object on the stack, or the size of a stack frame.
 ///
@@ -319,6 +320,7 @@ mod tests {
     use ir::Function;
     use ir::types;
     use super::*;
+    use std::string::ToString;
 
     #[test]
     fn stack_slot() {

lib/cretonne/src/ir/trapcode.rs

@@ -89,6 +89,7 @@ impl FromStr for TrapCode {
 #[cfg(test)]
 mod tests {
     use super::*;
+    use std::string::ToString;
 
     // Everything but user-defined codes.
     const CODES: [TrapCode; 8] = [

lib/cretonne/src/ir/types.rs

@@ -324,6 +324,7 @@ impl Default for Type {
 #[cfg(test)]
 mod tests {
     use super::*;
+    use std::string::ToString;
 
     #[test]
     fn basic_scalars() {

lib/cretonne/src/isa/arm32/mod.rs

@@ -14,6 +14,7 @@ use isa::{TargetIsa, RegInfo, RegClass, EncInfo};
 use ir;
 use regalloc;
 use std::fmt;
+use std::boxed::Box;
 
 #[allow(dead_code)]
 struct Isa {

lib/cretonne/src/isa/arm32/registers.rs

@@ -8,6 +8,7 @@ include!(concat!(env!("OUT_DIR"), "/registers-arm32.rs"));
 mod tests {
     use super::{INFO, GPR, S, D};
     use isa::RegUnit;
+    use std::string::{String, ToString};
 
     #[test]
     fn unit_encodings() {

lib/cretonne/src/isa/arm64/mod.rs

@@ -14,6 +14,7 @@ use isa::{TargetIsa, RegInfo, RegClass, EncInfo};
 use ir;
 use regalloc;
 use std::fmt;
+use std::boxed::Box;
 
 #[allow(dead_code)]
 struct Isa {

lib/cretonne/src/isa/arm64/registers.rs

@@ -8,6 +8,7 @@ include!(concat!(env!("OUT_DIR"), "/registers-arm64.rs"));
 mod tests {
     use super::INFO;
     use isa::RegUnit;
+    use std::string::{String, ToString};
 
     #[test]
     fn unit_encodings() {

lib/cretonne/src/isa/intel/mod.rs

@@ -16,7 +16,7 @@ use regalloc;
 use result;
 use timing;
 use std::fmt;
-
+use std::boxed::Box;
 
 #[allow(dead_code)]
 struct Isa {

lib/cretonne/src/isa/intel/registers.rs

@@ -8,6 +8,7 @@ include!(concat!(env!("OUT_DIR"), "/registers-intel.rs"));
 mod tests {
     use super::*;
     use isa::RegUnit;
+    use std::string::{String, ToString};
 
     #[test]
     fn unit_encodings() {

lib/cretonne/src/isa/mod.rs

@@ -54,6 +54,7 @@ use result;
 use timing;
 use isa::enc_tables::Encodings;
 use std::fmt;
+use std::boxed::Box;
 
 #[cfg(build_riscv)]
 mod riscv;

lib/cretonne/src/isa/riscv/mod.rs

@@ -14,6 +14,7 @@ use isa::{TargetIsa, RegInfo, RegClass, EncInfo};
 use ir;
 use regalloc;
 use std::fmt;
+use std::boxed::Box;
 
 #[allow(dead_code)]
 struct Isa {
@@ -116,6 +117,7 @@ mod tests {
     use isa;
     use ir::{DataFlowGraph, InstructionData, Opcode};
     use ir::{types, immediates};
+    use std::string::{String, ToString};
 
     fn encstr(isa: &isa::TargetIsa, enc: Result<isa::Encoding, isa::Legalize>) -> String {
         match enc {

lib/cretonne/src/isa/riscv/registers.rs

@@ -8,6 +8,7 @@ include!(concat!(env!("OUT_DIR"), "/registers-riscv.rs"));
 mod tests {
     use super::{INFO, GPR, FPR};
     use isa::RegUnit;
+    use std::string::{String, ToString};
 
     #[test]
     fn unit_encodings() {

lib/cretonne/src/isa/riscv/settings.rs

@@ -12,6 +12,7 @@ include!(concat!(env!("OUT_DIR"), "/settings-riscv.rs"));
 mod tests {
     use super::{builder, Flags};
     use settings::{self, Configurable};
+    use std::string::ToString;
 
     #[test]
     fn display_default() {

lib/cretonne/src/iterators.rs

@@ -48,6 +48,8 @@ where
 
 #[cfg(test)]
 mod tests {
+    use std::vec::Vec;
+
     #[test]
     fn adjpairs() {
         use super::IteratorExtras;

lib/cretonne/src/legalizer/boundary.rs

@@ -25,6 +25,7 @@ use ir::{Function, DataFlowGraph, Inst, InstBuilder, Ebb, Type, Value, Signature
 use ir::instructions::CallInfo;
 use isa::TargetIsa;
 use legalizer::split::{isplit, vsplit};
+use std::vec::Vec;
 
 /// Legalize all the function signatures in `func`.
 ///

lib/cretonne/src/legalizer/split.rs

@@ -68,6 +68,7 @@ use cursor::{Cursor, CursorPosition, FuncCursor};
 use flowgraph::ControlFlowGraph;
 use ir::{self, Ebb, Inst, Value, Type, Opcode, ValueDef, InstructionData, InstBuilder};
 use std::iter;
+use std::vec::Vec;
 
 /// Split `value` into two values using the `isplit` semantics. Do this by reusing existing values
 /// if possible.

lib/cretonne/src/licm.rs

@@ -8,6 +8,7 @@ use dominator_tree::DominatorTree;
 use entity::{EntityList, ListPool};
 use loop_analysis::{Loop, LoopAnalysis};
 use timing;
+use std::vec::Vec;
 
 /// Performs the LICM pass by detecting loops within the CFG and moving
 /// loop-invariant instructions out of them.

lib/cretonne/src/loop_analysis.rs

@@ -8,6 +8,7 @@ use flowgraph::ControlFlowGraph;
 use ir::{Function, Ebb, Layout};
 use packed_option::PackedOption;
 use timing;
+use std::vec::Vec;
 
 /// A opaque reference to a code loop.
 #[derive(Copy, Clone, PartialEq, Eq, Hash)]
@@ -230,6 +231,7 @@ mod test {
     use loop_analysis::{Loop, LoopAnalysis};
     use flowgraph::ControlFlowGraph;
     use dominator_tree::DominatorTree;
+    use std::vec::Vec;
 
     #[test]
     fn nested_loops_detection() {

lib/cretonne/src/partition_slice.rs

@@ -33,6 +33,7 @@ where
 #[cfg(test)]
 mod tests {
     use super::partition_slice;
+    use std::vec::Vec;
 
     fn check(x: &[u32], want: &[u32]) {
         assert_eq!(x.len(), want.len());

lib/cretonne/src/regalloc/allocatable_set.rs

@@ -221,6 +221,7 @@ impl fmt::Display for AllocatableSet {
 mod tests {
     use super::*;
     use isa::registers::{RegClass, RegClassData};
+    use std::vec::Vec;
 
     // Register classes for testing.
     const GPR: RegClass = &RegClassData {

lib/cretonne/src/regalloc/coalescing.rs

@@ -18,6 +18,7 @@ use std::cmp;
 use std::iter;
 use std::fmt;
 use std::slice;
+use std::vec::Vec;
 use isa::{TargetIsa, EncInfo};
 use timing;
 

lib/cretonne/src/regalloc/diversion.rs

@@ -11,6 +11,7 @@ use ir::{Value, ValueLoc, ValueLocations, StackSlot};
 use ir::{InstructionData, Opcode};
 use isa::{RegUnit, RegInfo};
 use std::fmt;
+use std::vec::Vec;
 
 /// A diversion of a value from its original location to a new register or stack location.
 ///

lib/cretonne/src/regalloc/live_value_tracker.rs

@@ -13,6 +13,7 @@ use regalloc::affinity::Affinity;
 use regalloc::liveness::Liveness;
 use regalloc::liverange::LiveRange;
 use std::collections::HashMap;
+use std::vec::Vec;
 
 type ValueList = EntityList<Value>;
 

lib/cretonne/src/regalloc/liveness.rs

@@ -184,6 +184,7 @@ use regalloc::affinity::Affinity;
 use regalloc::liverange::{LiveRange, LiveRangeForest, LiveRangeContext};
 use std::mem;
 use std::ops::Index;
+use std::vec::Vec;
 use timing;
 
 /// A set of live ranges, indexed by value number.

lib/cretonne/src/regalloc/liverange.rs

@@ -463,6 +463,7 @@ mod tests {
     use entity::EntityRef;
     use ir::{ProgramOrder, ExpandedProgramPoint};
     use std::cmp::Ordering;
+    use std::vec::Vec;
 
     // Dummy program order which simply compares indexes.
     // It is assumed that EBBs have indexes that are multiples of 10, and instructions have indexes

lib/cretonne/src/regalloc/pressure.rs

@@ -273,6 +273,7 @@ mod tests {
     use regalloc::AllocatableSet;
     use std::borrow::Borrow;
     use super::Pressure;
+    use std::boxed::Box;
 
     // Make an arm32 `TargetIsa`, if possible.
     fn arm32() -> Option<Box<TargetIsa>> {

lib/cretonne/src/regalloc/reload.rs

@@ -21,6 +21,7 @@ use regalloc::live_value_tracker::{LiveValue, LiveValueTracker};
 use regalloc::liveness::Liveness;
 use timing;
 use topo_order::TopoOrder;
+use std::vec::Vec;
 
 /// Reusable data structures for the reload pass.
 pub struct Reload {

lib/cretonne/src/regalloc/solver.rs

@@ -108,6 +108,7 @@ use std::fmt;
 use std::mem;
 use super::AllocatableSet;
 use std::u16;
+use std::vec::Vec;
 
 /// A variable in the constraint problem.
 ///
@@ -1162,6 +1163,7 @@ mod tests {
     use isa::{TargetIsa, RegClass, RegUnit, RegInfo};
     use regalloc::AllocatableSet;
     use super::{Solver, Move};
+    use std::boxed::Box;
 
     // Make an arm32 `TargetIsa`, if possible.
     fn arm32() -> Option<Box<TargetIsa>> {

lib/cretonne/src/regalloc/spilling.rs

@@ -26,6 +26,7 @@ use regalloc::liveness::Liveness;
 use regalloc::pressure::Pressure;
 use regalloc::virtregs::VirtRegs;
 use std::fmt;
+use std::vec::Vec;
 use timing;
 use topo_order::TopoOrder;
 

lib/cretonne/src/regalloc/virtregs.rs

@@ -21,6 +21,7 @@ use packed_option::PackedOption;
 use ref_slice::ref_slice;
 use std::cmp::Ordering;
 use std::fmt;
+use std::vec::Vec;
 
 /// A virtual register reference.
 #[derive(Copy, Clone, PartialEq, Eq, Hash, PartialOrd, Ord)]

lib/cretonne/src/settings.rs

@@ -24,6 +24,7 @@ use constant_hash::{probe, simple_hash};
 use isa::TargetIsa;
 use std::fmt;
 use std::result;
+use std::vec::Vec;
 
 /// A string-based configurator for settings groups.
 ///
@@ -347,6 +348,7 @@ mod tests {
     use super::{builder, Flags};
     use super::Error::*;
     use super::Configurable;
+    use std::string::ToString;
 
     #[test]
     fn display_default() {

lib/cretonne/src/simple_gvn.rs

@@ -6,6 +6,7 @@ use dominator_tree::DominatorTree;
 use ir::{InstructionData, Function, Inst, Opcode, Type};
 use scoped_hash_map::ScopedHashMap;
 use timing;
+use std::vec::Vec;
 
 /// Test whether the given opcode is unsafe to even consider for GVN.
 fn trivially_unsafe_for_gvn(opcode: Opcode) -> bool {

lib/cretonne/src/topo_order.rs

@@ -3,6 +3,7 @@
 use entity::SparseSet;
 use dominator_tree::DominatorTree;
 use ir::{Ebb, Layout};
+use std::vec::Vec;
 
 /// Present EBBs in a topological order such that all dominating EBBs are guaranteed to be visited
 /// before the current EBB.

lib/cretonne/src/verifier/mod.rs

@@ -73,6 +73,8 @@ use std::collections::BTreeSet;
 use std::error as std_error;
 use std::fmt::{self, Display, Formatter, Write};
 use std::result;
+use std::vec::Vec;
+use std::string::String;
 use timing;
 
 pub use self::cssa::verify_cssa;

lib/cretonne/src/write.rs

@@ -9,6 +9,7 @@ use isa::{TargetIsa, RegInfo};
 use std::fmt::{self, Result, Error, Write};
 use std::result;
 use packed_option::ReservedValue;
+use std::string::String;
 
 /// Write `func` to `w` as equivalent text.
 /// Use `isa` to emit ISA-dependent annotations.
@@ -466,6 +467,7 @@ impl<'a> fmt::Display for DisplayValues<'a> {
 mod tests {
     use ir::{Function, ExternalName, StackSlotData, StackSlotKind};
     use ir::types;
+    use std::string::ToString;
 
     #[test]
     fn basic() {

lib/frontend/src/ssa.rs

@@ -15,6 +15,7 @@ use std::u32;
 use cretonne::ir::types::{F32, F64};
 use cretonne::ir::immediates::{Ieee32, Ieee64};
 use std::mem;
+use std::vec::Vec;
 
 /// Structure containing the data relevant the construction of SSA for a given function.
 ///

lib/wasm/src/code_translator.rs

@@ -34,6 +34,7 @@ use state::{TranslationState, ControlStackFrame};
 use std::collections::{HashMap, hash_map};
 use environ::{FuncEnvironment, GlobalValue};
 use std::{i32, u32};
+use std::vec::Vec;
 
 /// Translates wasm operators into Cretonne IL instructions. Returns `true` if it inserted
 /// a return.

lib/wasm/src/environ/dummy.rs

@@ -10,6 +10,8 @@ use cretonne::cursor::FuncCursor;
 use cretonne::settings;
 use wasmparser;
 use std::error::Error;
+use std::vec::Vec;
+use std::string::String;
 
 /// Compute a `ir::ExternalName` for a given wasm function index.
 fn get_func_name(func_index: FunctionIndex) -> ir::ExternalName {

lib/wasm/src/environ/spec.rs

@@ -5,6 +5,8 @@ use cretonne::cursor::FuncCursor;
 use cretonne::settings::Flags;
 use translation_utils::{SignatureIndex, FunctionIndex, TableIndex, GlobalIndex, MemoryIndex,
                         Global, Table, Memory};
+use std::vec::Vec;
+use std::string::String;
 
 /// The value of a WebAssembly global variable.
 #[derive(Clone, Copy)]

lib/wasm/src/module_translator.rs

@@ -8,6 +8,8 @@ use sections_translator::{SectionParsingError, parse_function_signatures, parse_
                           parse_elements_section, parse_data_section};
 use environ::ModuleEnvironment;
 
+use std::string::String;
+
 /// Translate a sequence of bytes forming a valid Wasm binary into a list of valid Cretonne IL
 /// [`Function`](../cretonne/ir/function/struct.Function.html).
 /// Returns the functions and also the mappings for imported functions and signature between the

lib/wasm/src/sections_translator.rs

@@ -16,6 +16,8 @@ use wasmparser::{Parser, ParserState, FuncType, ImportSectionEntryType, External
 use wasmparser;
 use std::str::from_utf8;
 use environ::ModuleEnvironment;
+use std::vec::Vec;
+use std::string::String;
 
 pub enum SectionParsingError {
     WrongSectionContent(String),

lib/wasm/src/state.rs

@@ -7,6 +7,7 @@ use cretonne::ir::{self, Ebb, Inst, Value};
 use environ::{FuncEnvironment, GlobalValue};
 use std::collections::HashMap;
 use translation_utils::{GlobalIndex, MemoryIndex, SignatureIndex, FunctionIndex};
+use std::vec::Vec;
 
 /// A control stack frame can be an `if`, a `block` or a `loop`, each one having the following
 /// fields: