ABI: implement register arguments with constraints. (#4858)

* ABI: implement register arguments with constraints.

Currently, Cranelift's ABI code emits a sequence of moves from physical
registers into vregs at the top of the function body, one for every
register-carried argument.

For a number of reasons, we want to move to operand constraints instead,
and remove the use of explicitly-named "pinned vregs"; this allows for
better regalloc in theory, as it removes the need to "reverse-engineer"
the sequence of moves.

This PR alters the ABI code so that it generates a single "args"
pseudo-instruction as the first instruction in the function body. This
pseudo-inst defs all register arguments, and constrains them to the
appropriate registers at the def-point. Subsequently the regalloc can
move them wherever it needs to.

Some care was taken not to have this pseudo-inst show up in
post-regalloc disassemblies, but the change did cause a general regalloc
"shift" in many tests, so the precise-output updates are a bit noisy.
Sorry about that!

A subsequent PR will handle the other half of the ABI code, namely, the
callsite case, with a similar preg-to-constraint conversion.

* Update based on review feedback.

* Review feedback.
This commit is contained in:
Chris Fallin
2022-09-08 20:03:14 -05:00
committed by GitHub
parent 13c7846815
commit 2986f6b0ff
101 changed files with 2688 additions and 2441 deletions

View File

@@ -208,6 +208,7 @@ impl Inst {
| Inst::VecReplicateLane { .. }
| Inst::Call { .. }
| Inst::CallInd { .. }
| Inst::Args { .. }
| Inst::Ret { .. }
| Inst::Jump { .. }
| Inst::CondBr { .. }
@@ -935,6 +936,11 @@ fn s390x_get_operands<F: Fn(VReg) -> VReg>(inst: &Inst, collector: &mut OperandC
collector.reg_defs(&*info.defs);
collector.reg_clobbers(info.clobbers);
}
&Inst::Args { ref args } => {
for arg in args {
collector.reg_fixed_def(arg.vreg, arg.preg);
}
}
&Inst::Ret { link, ref rets } => {
collector.reg_use(link);
collector.reg_uses(&rets[..]);
@@ -1011,6 +1017,13 @@ impl MachInst for Inst {
}
}
fn is_args(&self) -> bool {
match self {
Self::Args { .. } => true,
_ => false,
}
}
fn is_term(&self) -> MachTerminator {
match self {
&Inst::Ret { .. } => MachTerminator::Ret,
@@ -3070,6 +3083,16 @@ impl Inst {
let rn = pretty_print_reg(info.rn, allocs);
format!("basr {}, {}", link, rn)
}
&Inst::Args { ref args } => {
let mut s = "args".to_string();
for arg in args {
use std::fmt::Write;
let preg = pretty_print_reg(arg.preg, &mut empty_allocs);
let def = pretty_print_reg(arg.vreg.to_reg(), allocs);
write!(&mut s, " {}={}", def, preg).unwrap();
}
s
}
&Inst::Ret { link, .. } => {
let link = pretty_print_reg(link, allocs);
format!("br {}", link)