Don't attempt to shrink regfill/regspill/regmove instructions.
This is a temporary workaround for bugs such as #420, where normal operand constraint checking doesn't correctly handle such instructions.
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@@ -5,6 +5,7 @@
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//! flexibility. However, once register allocation is done, this is no longer important, and we
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//! flexibility. However, once register allocation is done, this is no longer important, and we
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//! can switch to smaller encodings when possible.
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//! can switch to smaller encodings when possible.
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use ir::instructions::InstructionData;
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use ir::Function;
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use ir::Function;
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use isa::TargetIsa;
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use isa::TargetIsa;
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use regalloc::RegDiversions;
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use regalloc::RegDiversions;
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@@ -22,6 +23,25 @@ pub fn shrink_instructions(func: &mut Function, isa: &TargetIsa) {
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for inst in func.layout.ebb_insts(ebb) {
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for inst in func.layout.ebb_insts(ebb) {
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let enc = func.encodings[inst];
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let enc = func.encodings[inst];
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if enc.is_legal() {
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if enc.is_legal() {
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// regmove/regfill/regspill are special instructions with register immediates
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// that represented as normal operands, so the normal predicates below don't
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// handle them correctly.
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//
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// Also, they need to be presented to the `RegDiversions` to update the
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// location tracking.
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//
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// TODO: Eventually, we want the register allocator to avoid leaving these special
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// instructions behind, but for now, just temporarily avoid trying to shrink them.
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match func.dfg[inst] {
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InstructionData::RegMove { .. }
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| InstructionData::RegFill { .. }
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| InstructionData::RegSpill { .. } => {
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divert.apply(&func.dfg[inst]);
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continue;
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}
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_ => ()
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}
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let ctrl_type = func.dfg.ctrl_typevar(inst);
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let ctrl_type = func.dfg.ctrl_typevar(inst);
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// Pick the last encoding with constraints that are satisfied.
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// Pick the last encoding with constraints that are satisfied.
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@@ -43,7 +63,6 @@ pub fn shrink_instructions(func: &mut Function, isa: &TargetIsa) {
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);
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);
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}
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}
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}
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}
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divert.apply(&func.dfg[inst]);
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}
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}
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}
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}
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}
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}
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