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Add support for SWidenHigh and UWidenHigh X86_64 for vcode backend

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Support is based on SSE4.1
This commit is contained in:
Johnnie Birch
2020-11-22 22:14:19 -08:00
parent 124096735b
commit 258013cff1
1 changed files with 36 additions and 4 deletions
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40
cranelift/codegen/src/isa/x64/lower.rs
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@@ -2845,10 +2845,26 @@ fn lower_insn_to_regs<C: LowerCtx<I = Inst>>(
}, },
Opcode::SwidenHigh => match (input_ty, output_ty) { Opcode::SwidenHigh => match (input_ty, output_ty) {
(types::I8X16, types::I16X8) => { (types::I8X16, types::I16X8) => {
unimplemented!("No lowering for {:?}", op); ctx.emit(Inst::gen_move(dst, src, output_ty));
ctx.emit(Inst::xmm_rm_r_imm(
SseOpcode::Palignr,
RegMem::reg(src),
dst,
8,
false,
));
ctx.emit(Inst::xmm_rm_r(SseOpcode::Pmovsxbw, RegMem::from(dst), dst));
} }
(types::I16X8, types::I32X4) => { (types::I16X8, types::I32X4) => {
unimplemented!("No lowering for {:?}", op); ctx.emit(Inst::gen_move(dst, src, output_ty));
ctx.emit(Inst::xmm_rm_r_imm(
SseOpcode::Palignr,
RegMem::reg(src),
dst,
8,
false,
));
ctx.emit(Inst::xmm_rm_r(SseOpcode::Pmovsxwd, RegMem::from(dst), dst));
} }
_ => unreachable!(), _ => unreachable!(),
}, },
@@ -2865,10 +2881,26 @@ fn lower_insn_to_regs<C: LowerCtx<I = Inst>>(
}, },
Opcode::UwidenHigh => match (input_ty, output_ty) { Opcode::UwidenHigh => match (input_ty, output_ty) {
(types::I8X16, types::I16X8) => { (types::I8X16, types::I16X8) => {
unimplemented!("No lowering for {:?}", op); ctx.emit(Inst::gen_move(dst, src, output_ty));
ctx.emit(Inst::xmm_rm_r_imm(
SseOpcode::Palignr,
RegMem::reg(src),
dst,
8,
false,
));
ctx.emit(Inst::xmm_rm_r(SseOpcode::Pmovzxbw, RegMem::from(dst), dst));
} }
(types::I16X8, types::I32X4) => { (types::I16X8, types::I32X4) => {
unimplemented!("No lowering for {:?}", op); ctx.emit(Inst::gen_move(dst, src, output_ty));
ctx.emit(Inst::xmm_rm_r_imm(
SseOpcode::Palignr,
RegMem::reg(src),
dst,
8,
false,
));
ctx.emit(Inst::xmm_rm_r(SseOpcode::Pmovzxwd, RegMem::from(dst), dst));
} }
_ => unreachable!(), _ => unreachable!(),
}, },