Migrate clz, ctz, popcnt, bitrev, is_null, is_invalid on x64 to ISLE. (#3848)
This commit is contained in:
Chris Fallin
@@ -1184,7 +1184,7 @@ block0(v0: i128, v1: i8):
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; Entry block: 0
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; Block 0:
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; (original IR block: block0)
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; (instruction range: 0 .. 10)
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; (instruction range: 0 .. 13)
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; Inst 0: lsl x4, x0, x2
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; Inst 1: lsl x3, x1, x2
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; Inst 2: orn w1, wzr, w2
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@@ -1192,9 +1192,12 @@ block0(v0: i128, v1: i8):
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; Inst 4: lsr x0, x0, x1
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; Inst 5: orr x0, x3, x0
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; Inst 6: ands xzr, x2, #64
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; Inst 7: csel x1, x4, x0, ne
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; Inst 8: csel x0, xzr, x4, ne
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; Inst 9: ret
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; Inst 7: csel x1, xzr, x4, ne
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; Inst 8: csel x0, x4, x0, ne
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; Inst 9: mov x2, x0
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; Inst 10: mov x0, x1
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; Inst 11: mov x1, x2
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; Inst 12: ret
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; }}
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function %ishl_i128_i128(i128, i128) -> i128 {
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@@ -1207,7 +1210,7 @@ block0(v0: i128, v1: i128):
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; Entry block: 0
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; Block 0:
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; (original IR block: block0)
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; (instruction range: 0 .. 10)
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; (instruction range: 0 .. 13)
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; Inst 0: lsl x3, x0, x2
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; Inst 1: lsl x1, x1, x2
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; Inst 2: orn w4, wzr, w2
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@@ -1215,9 +1218,12 @@ block0(v0: i128, v1: i128):
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; Inst 4: lsr x0, x0, x4
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; Inst 5: orr x0, x1, x0
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; Inst 6: ands xzr, x2, #64
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; Inst 7: csel x1, x3, x0, ne
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; Inst 8: csel x0, xzr, x3, ne
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; Inst 9: ret
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; Inst 7: csel x1, xzr, x3, ne
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; Inst 8: csel x0, x3, x0, ne
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; Inst 9: mov x2, x0
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; Inst 10: mov x0, x1
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; Inst 11: mov x1, x2
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; Inst 12: ret
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; }}
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function %ushr_i128_i8(i128, i8) -> i128 {
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@@ -1230,17 +1236,20 @@ block0(v0: i128, v1: i8):
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; Entry block: 0
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; Block 0:
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; (original IR block: block0)
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; (instruction range: 0 .. 10)
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; (instruction range: 0 .. 13)
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; Inst 0: lsr x3, x0, x2
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; Inst 1: lsr x0, x1, x2
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; Inst 2: orn w4, wzr, w2
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; Inst 3: lsl x1, x1, #1
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; Inst 4: lsl x1, x1, x4
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; Inst 5: orr x3, x3, x1
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; Inst 5: orr x1, x3, x1
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; Inst 6: ands xzr, x2, #64
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; Inst 7: csel x1, xzr, x0, ne
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; Inst 8: csel x0, x0, x3, ne
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; Inst 9: ret
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; Inst 7: csel x1, x0, x1, ne
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; Inst 8: csel x0, xzr, x0, ne
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; Inst 9: mov x2, x0
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; Inst 10: mov x0, x1
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; Inst 11: mov x1, x2
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; Inst 12: ret
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; }}
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function %ushr_i128_i128(i128, i128) -> i128 {
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@@ -1253,17 +1262,20 @@ block0(v0: i128, v1: i128):
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; Entry block: 0
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; Block 0:
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; (original IR block: block0)
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; (instruction range: 0 .. 10)
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; (instruction range: 0 .. 13)
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; Inst 0: lsr x3, x0, x2
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; Inst 1: lsr x0, x1, x2
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; Inst 2: orn w4, wzr, w2
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; Inst 3: lsl x1, x1, #1
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; Inst 4: lsl x1, x1, x4
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; Inst 5: orr x3, x3, x1
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; Inst 5: orr x1, x3, x1
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; Inst 6: ands xzr, x2, #64
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; Inst 7: csel x1, xzr, x0, ne
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; Inst 8: csel x0, x0, x3, ne
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; Inst 9: ret
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; Inst 7: csel x1, x0, x1, ne
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; Inst 8: csel x0, xzr, x0, ne
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; Inst 9: mov x2, x0
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; Inst 10: mov x0, x1
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; Inst 11: mov x1, x2
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; Inst 12: ret
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; }}
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function %sshr_i128_i8(i128, i8) -> i128 {
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@@ -1276,7 +1288,7 @@ block0(v0: i128, v1: i8):
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; Entry block: 0
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; Block 0:
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; (original IR block: block0)
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; (instruction range: 0 .. 11)
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; (instruction range: 0 .. 13)
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; Inst 0: lsr x3, x0, x2
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; Inst 1: asr x0, x1, x2
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; Inst 2: orn w4, wzr, w2
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@@ -1285,9 +1297,11 @@ block0(v0: i128, v1: i8):
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; Inst 5: asr x1, x1, #63
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; Inst 6: orr x3, x3, x4
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; Inst 7: ands xzr, x2, #64
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; Inst 8: csel x1, x1, x0, ne
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; Inst 9: csel x0, x0, x3, ne
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; Inst 10: ret
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; Inst 8: csel x2, x0, x3, ne
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; Inst 9: csel x0, x1, x0, ne
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; Inst 10: mov x1, x0
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; Inst 11: mov x0, x2
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; Inst 12: ret
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; }}
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function %sshr_i128_i128(i128, i128) -> i128 {
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@@ -1300,7 +1314,7 @@ block0(v0: i128, v1: i128):
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; Entry block: 0
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; Block 0:
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; (original IR block: block0)
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; (instruction range: 0 .. 11)
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; (instruction range: 0 .. 13)
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; Inst 0: lsr x3, x0, x2
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; Inst 1: asr x0, x1, x2
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; Inst 2: orn w4, wzr, w2
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@@ -1309,8 +1323,10 @@ block0(v0: i128, v1: i128):
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; Inst 5: asr x1, x1, #63
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; Inst 6: orr x3, x3, x4
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; Inst 7: ands xzr, x2, #64
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; Inst 8: csel x1, x1, x0, ne
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; Inst 9: csel x0, x0, x3, ne
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; Inst 10: ret
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; Inst 8: csel x2, x0, x3, ne
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; Inst 9: csel x0, x1, x0, ne
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; Inst 10: mov x1, x0
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; Inst 11: mov x0, x2
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; Inst 12: ret
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; }}
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@@ -16,19 +16,19 @@ block0(v0: i128, v1: i128):
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; Entry block: 0
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; Block 0:
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; (original IR block: block0)
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; (instruction range: 0 .. 24)
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; (instruction range: 0 .. 25)
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; Inst 0: mov x4, x1
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; Inst 1: orr x1, xzr, #128
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; Inst 2: sub x1, x1, x2
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; Inst 3: lsr x3, x0, x2
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; Inst 4: lsr x5, x4, x2
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; Inst 3: lsr x5, x0, x2
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; Inst 4: lsr x3, x4, x2
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; Inst 5: orn w6, wzr, w2
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; Inst 6: lsl x7, x4, #1
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; Inst 7: lsl x6, x7, x6
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; Inst 8: orr x6, x3, x6
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; Inst 8: orr x5, x5, x6
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; Inst 9: ands xzr, x2, #64
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; Inst 10: csel x3, xzr, x5, ne
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; Inst 11: csel x2, x5, x6, ne
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; Inst 10: csel x2, x3, x5, ne
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; Inst 11: csel x3, xzr, x3, ne
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; Inst 12: lsl x5, x0, x1
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; Inst 13: lsl x4, x4, x1
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; Inst 14: orn w6, wzr, w1
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@@ -36,11 +36,12 @@ block0(v0: i128, v1: i128):
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; Inst 16: lsr x0, x0, x6
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; Inst 17: orr x0, x4, x0
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; Inst 18: ands xzr, x1, #64
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; Inst 19: csel x1, x5, x0, ne
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; Inst 20: csel x0, xzr, x5, ne
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; Inst 21: orr x1, x3, x1
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; Inst 22: orr x0, x2, x0
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; Inst 23: ret
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; Inst 19: csel x1, xzr, x5, ne
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; Inst 20: csel x0, x5, x0, ne
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; Inst 21: orr x3, x3, x0
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; Inst 22: orr x0, x2, x1
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; Inst 23: mov x1, x3
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; Inst 24: ret
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; }}
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function %f0(i64, i64) -> i64 {
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@@ -125,7 +126,7 @@ block0(v0: i128, v1: i128):
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; Entry block: 0
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; Block 0:
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; (original IR block: block0)
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; (instruction range: 0 .. 27)
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; (instruction range: 0 .. 24)
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; Inst 0: mov x4, x0
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; Inst 1: orr x0, xzr, #128
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; Inst 2: sub x0, x0, x2
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@@ -136,8 +137,8 @@ block0(v0: i128, v1: i128):
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; Inst 7: lsr x6, x7, x6
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; Inst 8: orr x5, x5, x6
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; Inst 9: ands xzr, x2, #64
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; Inst 10: csel x2, x3, x5, ne
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; Inst 11: csel x3, xzr, x3, ne
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; Inst 10: csel x2, xzr, x3, ne
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; Inst 11: csel x3, x3, x5, ne
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; Inst 12: lsr x5, x4, x0
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; Inst 13: lsr x4, x1, x0
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; Inst 14: orn w6, wzr, w0
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@@ -145,14 +146,11 @@ block0(v0: i128, v1: i128):
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; Inst 16: lsl x1, x1, x6
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; Inst 17: orr x1, x5, x1
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; Inst 18: ands xzr, x0, #64
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; Inst 19: csel x0, xzr, x4, ne
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; Inst 20: csel x1, x4, x1, ne
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; Inst 21: orr x1, x3, x1
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; Inst 22: orr x0, x2, x0
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; Inst 23: mov x2, x0
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; Inst 24: mov x0, x1
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; Inst 25: mov x1, x2
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; Inst 26: ret
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; Inst 19: csel x0, x4, x1, ne
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; Inst 20: csel x1, xzr, x4, ne
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; Inst 21: orr x0, x2, x0
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; Inst 22: orr x1, x3, x1
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; Inst 23: ret
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; }}
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function %f4(i64, i64) -> i64 {
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@@ -43,7 +43,7 @@ block0(v0: f64, v1: i64):
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; Entry block: 0
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; Block 0:
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; (original IR block: block0)
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; (instruction range: 0 .. 16)
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; (instruction range: 0 .. 17)
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; Inst 0: pushq %rbp
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; Inst 1: movq %rsp, %rbp
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; Inst 2: movsd 0(%rdi), %xmm1
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@@ -54,10 +54,12 @@ block0(v0: f64, v1: i64):
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; Inst 7: andq $1, %rsi
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; Inst 8: ucomisd %xmm0, %xmm1
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; Inst 9: movaps %xmm0, %xmm1
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; Inst 10: jz $check; movsd %xmm0, %xmm1; $check: jnp $next; movsd %xmm0, %xmm1; $next
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; Inst 11: movq %rsi, %rax
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; Inst 12: movaps %xmm1, %xmm0
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; Inst 13: movq %rbp, %rsp
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; Inst 14: popq %rbp
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; Inst 15: ret
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; Inst 10: jz $next; movsd %xmm0, %xmm1; $next:
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; Inst 11: jnp $next; movsd %xmm0, %xmm1; $next:
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; Inst 12: movq %rsi, %rax
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; Inst 13: movaps %xmm1, %xmm0
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; Inst 14: movq %rbp, %rsp
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; Inst 15: popq %rbp
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; Inst 16: ret
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; }}
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@@ -600,57 +600,55 @@ block0(v0: i128):
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; Entry block: 0
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; Block 0:
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; (original IR block: block0)
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; (instruction range: 0 .. 50)
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; (instruction range: 0 .. 48)
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; Inst 0: pushq %rbp
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; Inst 1: movq %rsp, %rbp
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; Inst 2: movq %rsi, %rdx
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; Inst 3: movq %rdi, %rsi
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; Inst 4: shrq $1, %rsi
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; Inst 5: movabsq $8608480567731124087, %rcx
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; Inst 6: andq %rcx, %rsi
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; Inst 7: movq %rdi, %rax
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; Inst 8: subq %rsi, %rax
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; Inst 9: shrq $1, %rsi
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; Inst 10: andq %rcx, %rsi
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; Inst 11: subq %rsi, %rax
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; Inst 12: shrq $1, %rsi
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; Inst 13: andq %rcx, %rsi
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; Inst 14: subq %rsi, %rax
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; Inst 15: movq %rax, %rsi
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; Inst 16: shrq $4, %rsi
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; Inst 17: addq %rax, %rsi
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; Inst 18: movabsq $1085102592571150095, %rdi
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; Inst 19: andq %rdi, %rsi
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; Inst 20: movabsq $72340172838076673, %rdi
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; Inst 21: imulq %rdi, %rsi
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; Inst 22: shrq $56, %rsi
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; Inst 23: movq %rdx, %rax
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; Inst 24: shrq $1, %rax
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; Inst 25: movabsq $8608480567731124087, %rcx
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; Inst 26: andq %rcx, %rax
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; Inst 27: movq %rdx, %rdi
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; Inst 28: subq %rax, %rdi
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; Inst 29: shrq $1, %rax
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; Inst 30: andq %rcx, %rax
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; Inst 31: subq %rax, %rdi
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; Inst 32: shrq $1, %rax
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; Inst 33: andq %rcx, %rax
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; Inst 34: subq %rax, %rdi
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; Inst 35: movq %rdi, %rax
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; Inst 36: shrq $4, %rax
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; Inst 37: addq %rdi, %rax
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; Inst 38: movabsq $1085102592571150095, %rdi
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; Inst 39: andq %rdi, %rax
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; Inst 40: movabsq $72340172838076673, %rdi
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; Inst 41: imulq %rdi, %rax
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; Inst 42: shrq $56, %rax
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; Inst 43: addq %rax, %rsi
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; Inst 44: xorq %rdi, %rdi
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; Inst 45: movq %rsi, %rax
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; Inst 46: movq %rdi, %rdx
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; Inst 47: movq %rbp, %rsp
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; Inst 48: popq %rbp
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; Inst 49: ret
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; Inst 2: movq %rdi, %rax
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; Inst 3: movq %rax, %rcx
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; Inst 4: shrq $1, %rcx
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; Inst 5: movabsq $8608480567731124087, %rdi
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; Inst 6: andq %rdi, %rcx
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; Inst 7: subq %rcx, %rax
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; Inst 8: shrq $1, %rcx
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; Inst 9: andq %rdi, %rcx
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; Inst 10: subq %rcx, %rax
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; Inst 11: shrq $1, %rcx
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; Inst 12: andq %rdi, %rcx
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; Inst 13: subq %rcx, %rax
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; Inst 14: movq %rax, %rdi
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; Inst 15: shrq $4, %rdi
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; Inst 16: addq %rax, %rdi
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; Inst 17: movabsq $1085102592571150095, %rax
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; Inst 18: andq %rax, %rdi
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; Inst 19: movabsq $72340172838076673, %rax
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; Inst 20: imulq %rax, %rdi
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; Inst 21: shrq $56, %rdi
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; Inst 22: movq %rsi, %rcx
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; Inst 23: shrq $1, %rcx
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; Inst 24: movabsq $8608480567731124087, %rax
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; Inst 25: andq %rax, %rcx
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; Inst 26: subq %rcx, %rsi
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; Inst 27: shrq $1, %rcx
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; Inst 28: andq %rax, %rcx
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; Inst 29: subq %rcx, %rsi
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; Inst 30: shrq $1, %rcx
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; Inst 31: andq %rax, %rcx
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; Inst 32: subq %rcx, %rsi
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; Inst 33: movq %rsi, %rax
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; Inst 34: shrq $4, %rax
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; Inst 35: addq %rsi, %rax
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; Inst 36: movabsq $1085102592571150095, %rsi
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; Inst 37: andq %rsi, %rax
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; Inst 38: movabsq $72340172838076673, %rsi
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; Inst 39: imulq %rsi, %rax
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; Inst 40: shrq $56, %rax
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; Inst 41: addq %rax, %rdi
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; Inst 42: xorq %rsi, %rsi
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; Inst 43: movq %rdi, %rax
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; Inst 44: movq %rsi, %rdx
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; Inst 45: movq %rbp, %rsp
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; Inst 46: popq %rbp
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; Inst 47: ret
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; }}
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function %f20(i128) -> i128 {
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@@ -663,108 +661,97 @@ block0(v0: i128):
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; Entry block: 0
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; Block 0:
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; (original IR block: block0)
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; (instruction range: 0 .. 101)
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; (instruction range: 0 .. 90)
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; Inst 0: pushq %rbp
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; Inst 1: movq %rsp, %rbp
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; Inst 2: movq %rdi, %rcx
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; Inst 3: movq %rcx, %rdi
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; Inst 4: movabsq $6148914691236517205, %rax
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; Inst 5: shrq $1, %rdi
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; Inst 6: andq %rax, %rdi
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; Inst 7: andq %rcx, %rax
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; Inst 2: movq %rsi, %rcx
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; Inst 3: movabsq $6148914691236517205, %rsi
|
||||
; Inst 4: movq %rcx, %rax
|
||||
; Inst 5: andq %rsi, %rax
|
||||
; Inst 6: shrq $1, %rcx
|
||||
; Inst 7: andq %rsi, %rcx
|
||||
; Inst 8: shlq $1, %rax
|
||||
; Inst 9: movq %rax, %rcx
|
||||
; Inst 10: orq %rdi, %rcx
|
||||
; Inst 11: movq %rcx, %rdi
|
||||
; Inst 12: movabsq $3689348814741910323, %rax
|
||||
; Inst 13: shrq $2, %rdi
|
||||
; Inst 14: andq %rax, %rdi
|
||||
; Inst 15: andq %rcx, %rax
|
||||
; Inst 16: shlq $2, %rax
|
||||
; Inst 17: movq %rax, %rcx
|
||||
; Inst 18: orq %rdi, %rcx
|
||||
; Inst 19: movq %rcx, %rdi
|
||||
; Inst 20: movabsq $1085102592571150095, %rax
|
||||
; Inst 21: shrq $4, %rdi
|
||||
; Inst 22: andq %rax, %rdi
|
||||
; Inst 23: andq %rcx, %rax
|
||||
; Inst 24: shlq $4, %rax
|
||||
; Inst 9: orq %rcx, %rax
|
||||
; Inst 10: movabsq $3689348814741910323, %rsi
|
||||
; Inst 11: movq %rax, %rcx
|
||||
; Inst 12: andq %rsi, %rcx
|
||||
; Inst 13: shrq $2, %rax
|
||||
; Inst 14: andq %rsi, %rax
|
||||
; Inst 15: shlq $2, %rcx
|
||||
; Inst 16: orq %rax, %rcx
|
||||
; Inst 17: movabsq $1085102592571150095, %rsi
|
||||
; Inst 18: movq %rcx, %rax
|
||||
; Inst 19: andq %rsi, %rax
|
||||
; Inst 20: shrq $4, %rcx
|
||||
; Inst 21: andq %rsi, %rcx
|
||||
; Inst 22: shlq $4, %rax
|
||||
; Inst 23: orq %rcx, %rax
|
||||
; Inst 24: movabsq $71777214294589695, %rsi
|
||||
; Inst 25: movq %rax, %rcx
|
||||
; Inst 26: orq %rdi, %rcx
|
||||
; Inst 27: movq %rcx, %rdi
|
||||
; Inst 28: movabsq $71777214294589695, %rax
|
||||
; Inst 29: shrq $8, %rdi
|
||||
; Inst 30: andq %rax, %rdi
|
||||
; Inst 31: andq %rcx, %rax
|
||||
; Inst 32: shlq $8, %rax
|
||||
; Inst 33: movq %rax, %rcx
|
||||
; Inst 34: orq %rdi, %rcx
|
||||
; Inst 35: movq %rcx, %rdi
|
||||
; Inst 36: movabsq $281470681808895, %rax
|
||||
; Inst 37: shrq $16, %rdi
|
||||
; Inst 38: andq %rax, %rdi
|
||||
; Inst 39: andq %rcx, %rax
|
||||
; Inst 40: shlq $16, %rax
|
||||
; Inst 41: orq %rdi, %rax
|
||||
; Inst 42: movq %rax, %rcx
|
||||
; Inst 43: movl $-1, %edi
|
||||
; Inst 44: shrq $32, %rcx
|
||||
; Inst 45: andq %rdi, %rcx
|
||||
; Inst 46: andq %rax, %rdi
|
||||
; Inst 47: shlq $32, %rdi
|
||||
; Inst 48: orq %rcx, %rdi
|
||||
; Inst 49: movq %rsi, %rcx
|
||||
; Inst 50: movq %rcx, %rsi
|
||||
; Inst 51: movabsq $6148914691236517205, %rax
|
||||
; Inst 52: shrq $1, %rsi
|
||||
; Inst 53: andq %rax, %rsi
|
||||
; Inst 54: andq %rcx, %rax
|
||||
; Inst 55: shlq $1, %rax
|
||||
; Inst 56: movq %rax, %rcx
|
||||
; Inst 57: orq %rsi, %rcx
|
||||
; Inst 58: movq %rcx, %rsi
|
||||
; Inst 59: movabsq $3689348814741910323, %rax
|
||||
; Inst 60: shrq $2, %rsi
|
||||
; Inst 61: andq %rax, %rsi
|
||||
; Inst 62: andq %rcx, %rax
|
||||
; Inst 63: shlq $2, %rax
|
||||
; Inst 64: movq %rax, %rcx
|
||||
; Inst 65: orq %rsi, %rcx
|
||||
; Inst 66: movq %rcx, %rsi
|
||||
; Inst 67: movabsq $1085102592571150095, %rax
|
||||
; Inst 68: shrq $4, %rsi
|
||||
; Inst 69: andq %rax, %rsi
|
||||
; Inst 70: andq %rcx, %rax
|
||||
; Inst 71: shlq $4, %rax
|
||||
; Inst 72: movq %rax, %rcx
|
||||
; Inst 73: orq %rsi, %rcx
|
||||
; Inst 74: movq %rcx, %rsi
|
||||
; Inst 75: movabsq $71777214294589695, %rax
|
||||
; Inst 76: shrq $8, %rsi
|
||||
; Inst 77: andq %rax, %rsi
|
||||
; Inst 78: andq %rcx, %rax
|
||||
; Inst 79: shlq $8, %rax
|
||||
; Inst 80: movq %rax, %rcx
|
||||
; Inst 81: orq %rsi, %rcx
|
||||
; Inst 82: movq %rcx, %rsi
|
||||
; Inst 83: movabsq $281470681808895, %rax
|
||||
; Inst 84: shrq $16, %rsi
|
||||
; Inst 85: andq %rax, %rsi
|
||||
; Inst 86: andq %rcx, %rax
|
||||
; Inst 87: shlq $16, %rax
|
||||
; Inst 88: orq %rsi, %rax
|
||||
; Inst 89: movq %rax, %rsi
|
||||
; Inst 90: movl $-1, %ecx
|
||||
; Inst 91: shrq $32, %rsi
|
||||
; Inst 92: andq %rcx, %rsi
|
||||
; Inst 93: andq %rax, %rcx
|
||||
; Inst 94: shlq $32, %rcx
|
||||
; Inst 95: orq %rsi, %rcx
|
||||
; Inst 96: movq %rcx, %rax
|
||||
; Inst 97: movq %rdi, %rdx
|
||||
; Inst 98: movq %rbp, %rsp
|
||||
; Inst 99: popq %rbp
|
||||
; Inst 100: ret
|
||||
; Inst 26: andq %rsi, %rcx
|
||||
; Inst 27: shrq $8, %rax
|
||||
; Inst 28: andq %rsi, %rax
|
||||
; Inst 29: shlq $8, %rcx
|
||||
; Inst 30: orq %rax, %rcx
|
||||
; Inst 31: movabsq $281470681808895, %rsi
|
||||
; Inst 32: movq %rcx, %rax
|
||||
; Inst 33: andq %rsi, %rax
|
||||
; Inst 34: shrq $16, %rcx
|
||||
; Inst 35: andq %rsi, %rcx
|
||||
; Inst 36: shlq $16, %rax
|
||||
; Inst 37: orq %rcx, %rax
|
||||
; Inst 38: movabsq $4294967295, %rcx
|
||||
; Inst 39: movq %rax, %rsi
|
||||
; Inst 40: andq %rcx, %rsi
|
||||
; Inst 41: shrq $32, %rax
|
||||
; Inst 42: shlq $32, %rsi
|
||||
; Inst 43: orq %rax, %rsi
|
||||
; Inst 44: movabsq $6148914691236517205, %rax
|
||||
; Inst 45: movq %rdi, %rcx
|
||||
; Inst 46: andq %rax, %rcx
|
||||
; Inst 47: shrq $1, %rdi
|
||||
; Inst 48: andq %rax, %rdi
|
||||
; Inst 49: shlq $1, %rcx
|
||||
; Inst 50: orq %rdi, %rcx
|
||||
; Inst 51: movabsq $3689348814741910323, %rdi
|
||||
; Inst 52: movq %rcx, %rax
|
||||
; Inst 53: andq %rdi, %rax
|
||||
; Inst 54: shrq $2, %rcx
|
||||
; Inst 55: andq %rdi, %rcx
|
||||
; Inst 56: shlq $2, %rax
|
||||
; Inst 57: orq %rcx, %rax
|
||||
; Inst 58: movabsq $1085102592571150095, %rdi
|
||||
; Inst 59: movq %rax, %rcx
|
||||
; Inst 60: andq %rdi, %rcx
|
||||
; Inst 61: shrq $4, %rax
|
||||
; Inst 62: andq %rdi, %rax
|
||||
; Inst 63: shlq $4, %rcx
|
||||
; Inst 64: orq %rax, %rcx
|
||||
; Inst 65: movabsq $71777214294589695, %rdi
|
||||
; Inst 66: movq %rcx, %rax
|
||||
; Inst 67: andq %rdi, %rax
|
||||
; Inst 68: shrq $8, %rcx
|
||||
; Inst 69: andq %rdi, %rcx
|
||||
; Inst 70: shlq $8, %rax
|
||||
; Inst 71: orq %rcx, %rax
|
||||
; Inst 72: movabsq $281470681808895, %rdi
|
||||
; Inst 73: movq %rax, %rcx
|
||||
; Inst 74: andq %rdi, %rcx
|
||||
; Inst 75: shrq $16, %rax
|
||||
; Inst 76: andq %rdi, %rax
|
||||
; Inst 77: shlq $16, %rcx
|
||||
; Inst 78: orq %rax, %rcx
|
||||
; Inst 79: movabsq $4294967295, %rax
|
||||
; Inst 80: movq %rcx, %rdi
|
||||
; Inst 81: andq %rax, %rdi
|
||||
; Inst 82: shrq $32, %rcx
|
||||
; Inst 83: shlq $32, %rdi
|
||||
; Inst 84: orq %rcx, %rdi
|
||||
; Inst 85: movq %rsi, %rax
|
||||
; Inst 86: movq %rdi, %rdx
|
||||
; Inst 87: movq %rbp, %rsp
|
||||
; Inst 88: popq %rbp
|
||||
; Inst 89: ret
|
||||
; }}
|
||||
|
||||
function %f21(i128, i64) {
|
||||
@@ -1020,11 +1007,11 @@ block0(v0: i128):
|
||||
; Inst 4: cmovzq %rcx, %rax
|
||||
; Inst 5: movl $63, %esi
|
||||
; Inst 6: subq %rax, %rsi
|
||||
; Inst 7: movabsq $-1, %rcx
|
||||
; Inst 8: bsrq %rdi, %rax
|
||||
; Inst 9: cmovzq %rcx, %rax
|
||||
; Inst 7: movabsq $-1, %rax
|
||||
; Inst 8: bsrq %rdi, %rcx
|
||||
; Inst 9: cmovzq %rax, %rcx
|
||||
; Inst 10: movl $63, %edi
|
||||
; Inst 11: subq %rax, %rdi
|
||||
; Inst 11: subq %rcx, %rdi
|
||||
; Inst 12: addq $64, %rdi
|
||||
; Inst 13: cmpq $64, %rsi
|
||||
; Inst 14: cmovnzq %rsi, %rdi
|
||||
@@ -1098,7 +1085,7 @@ block0(v0: i128, v1: i128):
|
||||
; Entry block: 0
|
||||
; Block 0:
|
||||
; (original IR block: block0)
|
||||
; (instruction range: 0 .. 25)
|
||||
; (instruction range: 0 .. 24)
|
||||
; Inst 0: pushq %rbp
|
||||
; Inst 1: movq %rsp, %rbp
|
||||
; Inst 2: movq %rdi, %rax
|
||||
@@ -1116,14 +1103,13 @@ block0(v0: i128, v1: i128):
|
||||
; Inst 14: cmovzq %rcx, %rax
|
||||
; Inst 15: orq %rdi, %rax
|
||||
; Inst 16: testq $64, %rdx
|
||||
; Inst 17: movq %rsi, %rdi
|
||||
; Inst 18: cmovzq %rax, %rdi
|
||||
; Inst 19: cmovzq %rsi, %rcx
|
||||
; Inst 20: movq %rcx, %rax
|
||||
; Inst 21: movq %rdi, %rdx
|
||||
; Inst 22: movq %rbp, %rsp
|
||||
; Inst 23: popq %rbp
|
||||
; Inst 24: ret
|
||||
; Inst 17: cmovzq %rsi, %rcx
|
||||
; Inst 18: cmovzq %rax, %rsi
|
||||
; Inst 19: movq %rcx, %rax
|
||||
; Inst 20: movq %rsi, %rdx
|
||||
; Inst 21: movq %rbp, %rsp
|
||||
; Inst 22: popq %rbp
|
||||
; Inst 23: ret
|
||||
; }}
|
||||
|
||||
function %f31(i128, i128) -> i128 {
|
||||
@@ -1136,7 +1122,7 @@ block0(v0: i128, v1: i128):
|
||||
; Entry block: 0
|
||||
; Block 0:
|
||||
; (original IR block: block0)
|
||||
; (instruction range: 0 .. 24)
|
||||
; (instruction range: 0 .. 25)
|
||||
; Inst 0: pushq %rbp
|
||||
; Inst 1: movq %rsp, %rbp
|
||||
; Inst 2: movq %rsi, %rax
|
||||
@@ -1152,15 +1138,16 @@ block0(v0: i128, v1: i128):
|
||||
; Inst 12: testq $127, %rdx
|
||||
; Inst 13: cmovzq %rcx, %rax
|
||||
; Inst 14: orq %rdi, %rax
|
||||
; Inst 15: xorq %rdi, %rdi
|
||||
; Inst 15: xorq %rcx, %rcx
|
||||
; Inst 16: testq $64, %rdx
|
||||
; Inst 17: cmovzq %rsi, %rdi
|
||||
; Inst 18: cmovzq %rax, %rsi
|
||||
; Inst 19: movq %rsi, %rax
|
||||
; Inst 20: movq %rdi, %rdx
|
||||
; Inst 21: movq %rbp, %rsp
|
||||
; Inst 22: popq %rbp
|
||||
; Inst 23: ret
|
||||
; Inst 17: movq %rsi, %rdi
|
||||
; Inst 18: cmovzq %rax, %rdi
|
||||
; Inst 19: cmovzq %rsi, %rcx
|
||||
; Inst 20: movq %rdi, %rax
|
||||
; Inst 21: movq %rcx, %rdx
|
||||
; Inst 22: movq %rbp, %rsp
|
||||
; Inst 23: popq %rbp
|
||||
; Inst 24: ret
|
||||
; }}
|
||||
|
||||
function %f32(i128, i128) -> i128 {
|
||||
@@ -1173,7 +1160,7 @@ block0(v0: i128, v1: i128):
|
||||
; Entry block: 0
|
||||
; Block 0:
|
||||
; (original IR block: block0)
|
||||
; (instruction range: 0 .. 25)
|
||||
; (instruction range: 0 .. 26)
|
||||
; Inst 0: pushq %rbp
|
||||
; Inst 1: movq %rsp, %rbp
|
||||
; Inst 2: movq %rdi, %rax
|
||||
@@ -1192,13 +1179,14 @@ block0(v0: i128, v1: i128):
|
||||
; Inst 15: orq %r8, %rax
|
||||
; Inst 16: sarq $63, %rsi
|
||||
; Inst 17: testq $64, %rdx
|
||||
; Inst 18: cmovzq %rdi, %rsi
|
||||
; Inst 19: cmovzq %rax, %rdi
|
||||
; Inst 20: movq %rdi, %rax
|
||||
; Inst 21: movq %rsi, %rdx
|
||||
; Inst 22: movq %rbp, %rsp
|
||||
; Inst 23: popq %rbp
|
||||
; Inst 24: ret
|
||||
; Inst 18: movq %rdi, %rcx
|
||||
; Inst 19: cmovzq %rax, %rcx
|
||||
; Inst 20: cmovzq %rdi, %rsi
|
||||
; Inst 21: movq %rcx, %rax
|
||||
; Inst 22: movq %rsi, %rdx
|
||||
; Inst 23: movq %rbp, %rsp
|
||||
; Inst 24: popq %rbp
|
||||
; Inst 25: ret
|
||||
; }}
|
||||
|
||||
function %f33(i128, i128) -> i128 {
|
||||
@@ -1211,27 +1199,27 @@ block0(v0: i128, v1: i128):
|
||||
; Entry block: 0
|
||||
; Block 0:
|
||||
; (original IR block: block0)
|
||||
; (instruction range: 0 .. 46)
|
||||
; (instruction range: 0 .. 48)
|
||||
; Inst 0: pushq %rbp
|
||||
; Inst 1: movq %rsp, %rbp
|
||||
; Inst 2: movq %rdi, %r9
|
||||
; Inst 2: movq %rdi, %rax
|
||||
; Inst 3: movq %rdx, %rcx
|
||||
; Inst 4: shlq %cl, %r9
|
||||
; Inst 5: movq %rsi, %rax
|
||||
; Inst 4: shlq %cl, %rax
|
||||
; Inst 5: movq %rsi, %r8
|
||||
; Inst 6: movq %rdx, %rcx
|
||||
; Inst 7: shlq %cl, %rax
|
||||
; Inst 7: shlq %cl, %r8
|
||||
; Inst 8: movl $64, %ecx
|
||||
; Inst 9: subq %rdx, %rcx
|
||||
; Inst 10: movq %rdi, %r10
|
||||
; Inst 11: shrq %cl, %r10
|
||||
; Inst 12: xorq %r8, %r8
|
||||
; Inst 10: movq %rdi, %r9
|
||||
; Inst 11: shrq %cl, %r9
|
||||
; Inst 12: xorq %rcx, %rcx
|
||||
; Inst 13: testq $127, %rdx
|
||||
; Inst 14: cmovzq %r8, %r10
|
||||
; Inst 15: orq %rax, %r10
|
||||
; Inst 14: cmovzq %rcx, %r9
|
||||
; Inst 15: orq %r8, %r9
|
||||
; Inst 16: testq $64, %rdx
|
||||
; Inst 17: movq %r9, %rax
|
||||
; Inst 18: cmovzq %r10, %rax
|
||||
; Inst 19: cmovzq %r9, %r8
|
||||
; Inst 17: movq %rcx, %r8
|
||||
; Inst 18: cmovzq %rax, %r8
|
||||
; Inst 19: cmovzq %r9, %rax
|
||||
; Inst 20: movl $128, %r9d
|
||||
; Inst 21: subq %rdx, %r9
|
||||
; Inst 22: movq %rdi, %rdx
|
||||
@@ -1247,17 +1235,19 @@ block0(v0: i128, v1: i128):
|
||||
; Inst 32: testq $127, %r9
|
||||
; Inst 33: cmovzq %rcx, %rsi
|
||||
; Inst 34: orq %rdx, %rsi
|
||||
; Inst 35: xorq %rcx, %rcx
|
||||
; Inst 35: xorq %rdx, %rdx
|
||||
; Inst 36: testq $64, %r9
|
||||
; Inst 37: cmovzq %rdi, %rcx
|
||||
; Inst 38: cmovzq %rsi, %rdi
|
||||
; Inst 39: orq %rdi, %r8
|
||||
; Inst 40: orq %rcx, %rax
|
||||
; Inst 41: movq %rax, %rdx
|
||||
; Inst 42: movq %r8, %rax
|
||||
; Inst 43: movq %rbp, %rsp
|
||||
; Inst 44: popq %rbp
|
||||
; Inst 45: ret
|
||||
; Inst 37: movq %rdi, %rcx
|
||||
; Inst 38: cmovzq %rsi, %rcx
|
||||
; Inst 39: movq %rdx, %rsi
|
||||
; Inst 40: cmovzq %rdi, %rsi
|
||||
; Inst 41: orq %rcx, %r8
|
||||
; Inst 42: orq %rsi, %rax
|
||||
; Inst 43: movq %rax, %rdx
|
||||
; Inst 44: movq %r8, %rax
|
||||
; Inst 45: movq %rbp, %rsp
|
||||
; Inst 46: popq %rbp
|
||||
; Inst 47: ret
|
||||
; }}
|
||||
|
||||
function %f34(i128, i128) -> i128 {
|
||||
@@ -1270,52 +1260,51 @@ block0(v0: i128, v1: i128):
|
||||
; Entry block: 0
|
||||
; Block 0:
|
||||
; (original IR block: block0)
|
||||
; (instruction range: 0 .. 46)
|
||||
; (instruction range: 0 .. 45)
|
||||
; Inst 0: pushq %rbp
|
||||
; Inst 1: movq %rsp, %rbp
|
||||
; Inst 2: movq %rdi, %rax
|
||||
; Inst 3: movq %rdx, %rcx
|
||||
; Inst 4: shrq %cl, %rax
|
||||
; Inst 5: movq %rsi, %r8
|
||||
; Inst 5: movq %rsi, %r9
|
||||
; Inst 6: movq %rdx, %rcx
|
||||
; Inst 7: shrq %cl, %r8
|
||||
; Inst 7: shrq %cl, %r9
|
||||
; Inst 8: movl $64, %ecx
|
||||
; Inst 9: subq %rdx, %rcx
|
||||
; Inst 10: movq %rsi, %r9
|
||||
; Inst 11: shlq %cl, %r9
|
||||
; Inst 10: movq %rsi, %r8
|
||||
; Inst 11: shlq %cl, %r8
|
||||
; Inst 12: xorq %rcx, %rcx
|
||||
; Inst 13: testq $127, %rdx
|
||||
; Inst 14: cmovzq %rcx, %r9
|
||||
; Inst 15: movq %r9, %rcx
|
||||
; Inst 16: orq %rax, %rcx
|
||||
; Inst 17: xorq %rax, %rax
|
||||
; Inst 18: testq $64, %rdx
|
||||
; Inst 14: cmovzq %rcx, %r8
|
||||
; Inst 15: orq %rax, %r8
|
||||
; Inst 16: xorq %rcx, %rcx
|
||||
; Inst 17: testq $64, %rdx
|
||||
; Inst 18: movq %r9, %rax
|
||||
; Inst 19: cmovzq %r8, %rax
|
||||
; Inst 20: cmovzq %rcx, %r8
|
||||
; Inst 21: movl $128, %r9d
|
||||
; Inst 22: subq %rdx, %r9
|
||||
; Inst 23: movq %rdi, %rdx
|
||||
; Inst 24: movq %r9, %rcx
|
||||
; Inst 25: shlq %cl, %rdx
|
||||
; Inst 26: movq %r9, %rcx
|
||||
; Inst 27: shlq %cl, %rsi
|
||||
; Inst 28: movl $64, %ecx
|
||||
; Inst 29: subq %r9, %rcx
|
||||
; Inst 30: shrq %cl, %rdi
|
||||
; Inst 31: xorq %rcx, %rcx
|
||||
; Inst 32: testq $127, %r9
|
||||
; Inst 33: cmovzq %rcx, %rdi
|
||||
; Inst 34: orq %rsi, %rdi
|
||||
; Inst 35: testq $64, %r9
|
||||
; Inst 36: movq %rdx, %rsi
|
||||
; Inst 37: cmovzq %rdi, %rsi
|
||||
; Inst 38: cmovzq %rdx, %rcx
|
||||
; Inst 39: orq %rcx, %r8
|
||||
; Inst 40: orq %rsi, %rax
|
||||
; Inst 41: movq %rax, %rdx
|
||||
; Inst 42: movq %r8, %rax
|
||||
; Inst 43: movq %rbp, %rsp
|
||||
; Inst 44: popq %rbp
|
||||
; Inst 45: ret
|
||||
; Inst 20: movq %rcx, %r8
|
||||
; Inst 21: cmovzq %r9, %r8
|
||||
; Inst 22: movl $128, %r9d
|
||||
; Inst 23: subq %rdx, %r9
|
||||
; Inst 24: movq %rdi, %rdx
|
||||
; Inst 25: movq %r9, %rcx
|
||||
; Inst 26: shlq %cl, %rdx
|
||||
; Inst 27: movq %r9, %rcx
|
||||
; Inst 28: shlq %cl, %rsi
|
||||
; Inst 29: movl $64, %ecx
|
||||
; Inst 30: subq %r9, %rcx
|
||||
; Inst 31: shrq %cl, %rdi
|
||||
; Inst 32: xorq %rcx, %rcx
|
||||
; Inst 33: testq $127, %r9
|
||||
; Inst 34: cmovzq %rcx, %rdi
|
||||
; Inst 35: orq %rsi, %rdi
|
||||
; Inst 36: testq $64, %r9
|
||||
; Inst 37: cmovzq %rdx, %rcx
|
||||
; Inst 38: cmovzq %rdi, %rdx
|
||||
; Inst 39: orq %rcx, %rax
|
||||
; Inst 40: orq %rdx, %r8
|
||||
; Inst 41: movq %r8, %rdx
|
||||
; Inst 42: movq %rbp, %rsp
|
||||
; Inst 43: popq %rbp
|
||||
; Inst 44: ret
|
||||
; }}
|
||||
|
||||
|
||||
@@ -14,17 +14,17 @@ block0(v0: i64):
|
||||
; (instruction range: 0 .. 25)
|
||||
; Inst 0: pushq %rbp
|
||||
; Inst 1: movq %rsp, %rbp
|
||||
; Inst 2: movq %rdi, %rsi
|
||||
; Inst 3: shrq $1, %rsi
|
||||
; Inst 4: movabsq $8608480567731124087, %rax
|
||||
; Inst 5: andq %rax, %rsi
|
||||
; Inst 6: subq %rsi, %rdi
|
||||
; Inst 7: shrq $1, %rsi
|
||||
; Inst 8: andq %rax, %rsi
|
||||
; Inst 9: subq %rsi, %rdi
|
||||
; Inst 10: shrq $1, %rsi
|
||||
; Inst 11: andq %rax, %rsi
|
||||
; Inst 12: subq %rsi, %rdi
|
||||
; Inst 2: movq %rdi, %rax
|
||||
; Inst 3: shrq $1, %rax
|
||||
; Inst 4: movabsq $8608480567731124087, %rsi
|
||||
; Inst 5: andq %rsi, %rax
|
||||
; Inst 6: subq %rax, %rdi
|
||||
; Inst 7: shrq $1, %rax
|
||||
; Inst 8: andq %rsi, %rax
|
||||
; Inst 9: subq %rax, %rdi
|
||||
; Inst 10: shrq $1, %rax
|
||||
; Inst 11: andq %rsi, %rax
|
||||
; Inst 12: subq %rax, %rdi
|
||||
; Inst 13: movq %rdi, %rsi
|
||||
; Inst 14: shrq $4, %rsi
|
||||
; Inst 15: addq %rdi, %rsi
|
||||
@@ -54,17 +54,17 @@ block0(v0: i64):
|
||||
; Inst 0: pushq %rbp
|
||||
; Inst 1: movq %rsp, %rbp
|
||||
; Inst 2: movq 0(%rdi), %rdi
|
||||
; Inst 3: movq %rdi, %rsi
|
||||
; Inst 4: shrq $1, %rsi
|
||||
; Inst 5: movabsq $8608480567731124087, %rax
|
||||
; Inst 6: andq %rax, %rsi
|
||||
; Inst 7: subq %rsi, %rdi
|
||||
; Inst 8: shrq $1, %rsi
|
||||
; Inst 9: andq %rax, %rsi
|
||||
; Inst 10: subq %rsi, %rdi
|
||||
; Inst 11: shrq $1, %rsi
|
||||
; Inst 12: andq %rax, %rsi
|
||||
; Inst 13: subq %rsi, %rdi
|
||||
; Inst 3: movq %rdi, %rax
|
||||
; Inst 4: shrq $1, %rax
|
||||
; Inst 5: movabsq $8608480567731124087, %rsi
|
||||
; Inst 6: andq %rsi, %rax
|
||||
; Inst 7: subq %rax, %rdi
|
||||
; Inst 8: shrq $1, %rax
|
||||
; Inst 9: andq %rsi, %rax
|
||||
; Inst 10: subq %rax, %rdi
|
||||
; Inst 11: shrq $1, %rax
|
||||
; Inst 12: andq %rsi, %rax
|
||||
; Inst 13: subq %rax, %rdi
|
||||
; Inst 14: movq %rdi, %rsi
|
||||
; Inst 15: shrq $4, %rsi
|
||||
; Inst 16: addq %rdi, %rsi
|
||||
@@ -89,29 +89,30 @@ block0(v0: i32):
|
||||
; Entry block: 0
|
||||
; Block 0:
|
||||
; (original IR block: block0)
|
||||
; (instruction range: 0 .. 22)
|
||||
; (instruction range: 0 .. 23)
|
||||
; Inst 0: pushq %rbp
|
||||
; Inst 1: movq %rsp, %rbp
|
||||
; Inst 2: movq %rdi, %rsi
|
||||
; Inst 3: shrl $1, %esi
|
||||
; Inst 4: andl $2004318071, %esi
|
||||
; Inst 5: subl %esi, %edi
|
||||
; Inst 6: shrl $1, %esi
|
||||
; Inst 7: andl $2004318071, %esi
|
||||
; Inst 8: subl %esi, %edi
|
||||
; Inst 9: shrl $1, %esi
|
||||
; Inst 10: andl $2004318071, %esi
|
||||
; Inst 11: subl %esi, %edi
|
||||
; Inst 12: movq %rdi, %rsi
|
||||
; Inst 13: shrl $4, %esi
|
||||
; Inst 14: addl %edi, %esi
|
||||
; Inst 15: andl $252645135, %esi
|
||||
; Inst 16: imull $16843009, %esi
|
||||
; Inst 17: shrl $24, %esi
|
||||
; Inst 18: movq %rsi, %rax
|
||||
; Inst 19: movq %rbp, %rsp
|
||||
; Inst 20: popq %rbp
|
||||
; Inst 21: ret
|
||||
; Inst 2: movq %rdi, %rax
|
||||
; Inst 3: shrl $1, %eax
|
||||
; Inst 4: movl $2004318071, %esi
|
||||
; Inst 5: andl %esi, %eax
|
||||
; Inst 6: subl %eax, %edi
|
||||
; Inst 7: shrl $1, %eax
|
||||
; Inst 8: andl %esi, %eax
|
||||
; Inst 9: subl %eax, %edi
|
||||
; Inst 10: shrl $1, %eax
|
||||
; Inst 11: andl %esi, %eax
|
||||
; Inst 12: subl %eax, %edi
|
||||
; Inst 13: movq %rdi, %rsi
|
||||
; Inst 14: shrl $4, %esi
|
||||
; Inst 15: addl %edi, %esi
|
||||
; Inst 16: andl $252645135, %esi
|
||||
; Inst 17: imull $16843009, %esi
|
||||
; Inst 18: shrl $24, %esi
|
||||
; Inst 19: movq %rsi, %rax
|
||||
; Inst 20: movq %rbp, %rsp
|
||||
; Inst 21: popq %rbp
|
||||
; Inst 22: ret
|
||||
; }}
|
||||
|
||||
function %popcnt32load(i64) -> i32 {
|
||||
@@ -125,29 +126,30 @@ block0(v0: i64):
|
||||
; Entry block: 0
|
||||
; Block 0:
|
||||
; (original IR block: block0)
|
||||
; (instruction range: 0 .. 23)
|
||||
; (instruction range: 0 .. 24)
|
||||
; Inst 0: pushq %rbp
|
||||
; Inst 1: movq %rsp, %rbp
|
||||
; Inst 2: movl 0(%rdi), %edi
|
||||
; Inst 3: movq %rdi, %rsi
|
||||
; Inst 4: shrl $1, %esi
|
||||
; Inst 5: andl $2004318071, %esi
|
||||
; Inst 6: subl %esi, %edi
|
||||
; Inst 7: shrl $1, %esi
|
||||
; Inst 8: andl $2004318071, %esi
|
||||
; Inst 9: subl %esi, %edi
|
||||
; Inst 10: shrl $1, %esi
|
||||
; Inst 11: andl $2004318071, %esi
|
||||
; Inst 12: subl %esi, %edi
|
||||
; Inst 13: movq %rdi, %rsi
|
||||
; Inst 14: shrl $4, %esi
|
||||
; Inst 15: addl %edi, %esi
|
||||
; Inst 16: andl $252645135, %esi
|
||||
; Inst 17: imull $16843009, %esi
|
||||
; Inst 18: shrl $24, %esi
|
||||
; Inst 19: movq %rsi, %rax
|
||||
; Inst 20: movq %rbp, %rsp
|
||||
; Inst 21: popq %rbp
|
||||
; Inst 22: ret
|
||||
; Inst 3: movq %rdi, %rax
|
||||
; Inst 4: shrl $1, %eax
|
||||
; Inst 5: movl $2004318071, %esi
|
||||
; Inst 6: andl %esi, %eax
|
||||
; Inst 7: subl %eax, %edi
|
||||
; Inst 8: shrl $1, %eax
|
||||
; Inst 9: andl %esi, %eax
|
||||
; Inst 10: subl %eax, %edi
|
||||
; Inst 11: shrl $1, %eax
|
||||
; Inst 12: andl %esi, %eax
|
||||
; Inst 13: subl %eax, %edi
|
||||
; Inst 14: movq %rdi, %rsi
|
||||
; Inst 15: shrl $4, %esi
|
||||
; Inst 16: addl %edi, %esi
|
||||
; Inst 17: andl $252645135, %esi
|
||||
; Inst 18: imull $16843009, %esi
|
||||
; Inst 19: shrl $24, %esi
|
||||
; Inst 20: movq %rsi, %rax
|
||||
; Inst 21: movq %rbp, %rsp
|
||||
; Inst 22: popq %rbp
|
||||
; Inst 23: ret
|
||||
; }}
|
||||
|
||||
|
||||
Reference in New Issue
Block a user