Flatten the Value reference representation.
All values are now references into the value table, so drop the distinction between direct and table values. Direct values don't exist any more. Also remove the parser support for the 'vxNN' syntax. Only 'vNN' values can be parsed now.
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@@ -3,7 +3,6 @@ test legalizer
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isa riscv
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; regex: V=v\d+
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; regex: VX=vx\d+
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function f(i32) {
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sig0 = signature(i32) -> i32
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@@ -7,7 +7,7 @@ isa riscv supports_m=1
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set is_64bit=1
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isa riscv supports_m=1
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; regex: V=vx?\d+
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; regex: V=v\d+
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function carry_out(i32, i32) -> i32, b1 {
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ebb0(v1: i32, v2: i32):
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@@ -2,7 +2,7 @@
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test legalizer
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isa riscv
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; regex: V=vx?\d+
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; regex: V=v\d+
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function int_split_args(i64) -> i64 {
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ebb0(v0: i64):
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@@ -2,7 +2,7 @@
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test legalizer
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isa riscv supports_m=1
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; regex: V=vx?\d+
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; regex: V=v\d+
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function bitwise_and(i64, i64) -> i64 {
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ebb0(v1: i64, v2: i64):
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@@ -2,7 +2,7 @@
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test legalizer
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isa riscv
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; regex: V=vx?\d+
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; regex: V=v\d+
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function simple(i64, i64) -> i64 {
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ebb0(v1: i64, v2: i64):
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@@ -12,13 +12,13 @@ test cat
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function defs() {
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ebb100(v20: i32):
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v1000 = iconst.i32x8 5
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vx200 = f64const 0x4.0p0
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v9200 = f64const 0x4.0p0
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trap
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}
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; sameln: function defs() {
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; nextln: $ebb100($v20: i32):
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; nextln: $v1000 = iconst.i32x8 5
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; nextln: $vx200 = f64const 0x1.0000000000000p2
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; nextln: $v9200 = f64const 0x1.0000000000000p2
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; nextln: trap
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; nextln: }
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