Add support for i32x4_trunc_sat_f64x2_u for x64

cranelift/codegen/src/isa/x64/inst/args.rs

@@ -631,6 +631,7 @@ pub enum SseOpcode {
     Roundss,
     Roundsd,
     Rsqrtss,
+    Shufps,
     Sqrtps,
     Sqrtpd,
     Sqrtss,
@@ -677,6 +678,7 @@ impl SseOpcode {
             | SseOpcode::Orps
             | SseOpcode::Rcpss
             | SseOpcode::Rsqrtss
+            | SseOpcode::Shufps
             | SseOpcode::Sqrtps
             | SseOpcode::Sqrtss
             | SseOpcode::Subps
@@ -1003,6 +1005,7 @@ impl fmt::Debug for SseOpcode {
             SseOpcode::Roundss => "roundss",
             SseOpcode::Roundsd => "roundsd",
             SseOpcode::Rsqrtss => "rsqrtss",
+            SseOpcode::Shufps => "shufps",
             SseOpcode::Sqrtps => "sqrtps",
             SseOpcode::Sqrtpd => "sqrtpd",
             SseOpcode::Sqrtss => "sqrtss",

cranelift/codegen/src/isa/x64/inst/emit.rs

@@ -1699,6 +1699,7 @@ pub(crate) fn emit(
                 SseOpcode::Roundss => (LegacyPrefixes::_66, 0x0F3A0A, 3),
                 SseOpcode::Roundpd => (LegacyPrefixes::_66, 0x0F3A09, 3),
                 SseOpcode::Roundsd => (LegacyPrefixes::_66, 0x0F3A0B, 3),
+                SseOpcode::Shufps => (LegacyPrefixes::None, 0x0FC6, 2),
                 _ => unimplemented!("Opcode {:?} not implemented", op),
             };
             let rex = RexFlags::from(*size);

cranelift/codegen/src/isa/x64/inst/emit_tests.rs

@@ -4125,6 +4125,18 @@ fn test_x64_emit() {
         "palignr $3, %xmm1, %xmm9",
     ));
 
+    insns.push((
+        Inst::xmm_rm_r_imm(
+            SseOpcode::Shufps,
+            RegMem::reg(xmm1),
+            w_xmm10,
+            136,
+            OperandSize::Size32,
+        ),
+        "440FC6D188",
+        "shufps  $136, %xmm1, %xmm10",
+    ));
+
     insns.push((
         Inst::xmm_rm_r_imm(
             SseOpcode::Roundps,