cranelift: only allow vector types with saturating arithmetic

This fixes #2883 by restricting which types are available to the `uadd_sat`, `sadd_sat`, `usub_sat`, and `ssub_sat` IR operations.

cranelift/filetests/filetests/isa/aarch64/saturating-ops.clif

@@ -1,35 +0,0 @@
-test compile
-set unwind_info=false
-target aarch64
-
-function %uaddsat64(i64, i64) -> i64 {
-block0(v0: i64, v1: i64):
-  v2 = uadd_sat.i64 v0, v1
-  return v2
-}
-
-; check: stp fp, lr, [sp, #-16]!
-; nextln: mov fp, sp
-; nextln: fmov d0, x0
-; nextln: fmov d1, x1
-; nextln: uqadd d0, d0, d1
-; nextln: mov x0, v0.d[0]
-; nextln: ldp fp, lr, [sp], #16
-; nextln: ret
-
-function %uaddsat8(i8, i8) -> i8 {
-block0(v0: i8, v1: i8):
-  v2 = uadd_sat.i8 v0, v1
-  return v2
-}
-
-; check: stp fp, lr, [sp, #-16]!
-; nextln: mov fp, sp
-; nextln: uxtb w0, w0
-; nextln: uxtb w1, w1
-; nextln: fmov d0, x0
-; nextln: fmov d1, x1
-; nextln: uqadd d0, d0, d1
-; nextln: mov x0, v0.d[0]
-; nextln: ldp fp, lr, [sp], #16
-; nextln: ret

cranelift/filetests/filetests/isa/arm32/aluops.clif

@@ -40,19 +40,6 @@ block0(v0: i32, v1: i32):
 ; nextln: pop {fp, lr}
 ; nextln: bx lr
 
-function %sadd_sat(i32, i32) -> i32 {
-block0(v0: i32, v1: i32):
-    v2 = sadd_sat v0, v1
-    return v2
-}
-
-; check: push {fp, lr}
-; nextln: mov fp, sp
-; nextln: qadd r0, r0, r1
-; nextln: mov sp, fp
-; nextln: pop {fp, lr}
-; nextln: bx lr
-
 function %isub(i32, i32) -> i32 {
 block0(v0: i32, v1: i32):
     v2 = isub v0, v1
@@ -66,19 +53,6 @@ block0(v0: i32, v1: i32):
 ; nextln: pop {fp, lr}
 ; nextln: bx lr
 
-function %ssub_sat(i32, i32) -> i32 {
-block0(v0: i32, v1: i32):
-    v2 = ssub_sat v0, v1
-    return v2
-}
-
-; check: push {fp, lr}
-; nextln: mov fp, sp
-; nextln: qsub r0, r0, r1
-; nextln: mov sp, fp
-; nextln: pop {fp, lr}
-; nextln: bx lr
-
 function %ineg(i32) -> i32 {
 block0(v0: i32):
     v1 = ineg v0