x64: Migrate brff and I128 branching instructions to ISLE (#4599)

https://github.com/bytecodealliance/wasmtime/pull/4599

cranelift/filetests/filetests/isa/x64/branches.clif

@@ -126,3 +126,62 @@ block2:
 ;   popq    %rbp
 ;   ret
 
+function %f4(f32, f32) -> b1 {
+block0(v0: f32, v1: f32):
+  v2 = fcmp eq v0, v1
+  brz v2, block1
+  jump block2
+block1:
+  v3 = bconst.b1 true
+  return v3
+block2:
+  v4 = bconst.b1 false
+  return v4
+}
+
+;   pushq   %rbp
+;   movq    %rsp, %rbp
+; block0:
+;   ucomiss %xmm1, %xmm0
+;   jp      label1
+;   jnz     label1; j label2
+; block1:
+;   movl    $1, %eax
+;   movq    %rbp, %rsp
+;   popq    %rbp
+;   ret
+; block2:
+;   xorl    %eax, %eax, %eax
+;   movq    %rbp, %rsp
+;   popq    %rbp
+;   ret
+
+function %f4(f32, f32) -> b1 {
+block0(v0: f32, v1: f32):
+  v2 = fcmp ne v0, v1
+  brz v2, block1
+  jump block2
+block1:
+  v3 = bconst.b1 true
+  return v3
+block2:
+  v4 = bconst.b1 false
+  return v4
+}
+
+;   pushq   %rbp
+;   movq    %rsp, %rbp
+; block0:
+;   ucomiss %xmm1, %xmm0
+;   jp      label2
+;   jnz     label2; j label1
+; block1:
+;   movl    $1, %eax
+;   movq    %rbp, %rsp
+;   popq    %rbp
+;   ret
+; block2:
+;   xorl    %eax, %eax, %eax
+;   movq    %rbp, %rsp
+;   popq    %rbp
+;   ret

cranelift/filetests/filetests/isa/x64/i128.clif

@@ -320,7 +320,7 @@ block2:
 ;   setz    %r11b
 ;   cmpq    $0, %rsi
 ;   setz    %al
-;   andb    %al, %r11b, %al
+;   testb   %r11b, %al
 ;   jnz     label1; j label2
 ; block1:
 ;   movl    $1, %eax
@@ -351,11 +351,11 @@ block2:
 ;   movq    %rsp, %rbp
 ; block0:
 ;   cmpq    $0, %rdi
-;   setnz   %r11b
+;   setz    %r11b
 ;   cmpq    $0, %rsi
-;   setnz   %al
-;   orb     %al, %r11b, %al
-;   jnz     label1; j label2
+;   setz    %al
+;   testb   %r11b, %al
+;   jz      label1; j label2
 ; block1:
 ;   movl    $1, %eax
 ;   movq    %rbp, %rsp

cranelift/filetests/filetests/runtests/fcmp.clif

@@ -0,0 +1,62 @@
+test run
+target aarch64
+target s390x
+target x86_64
+
+function %fcmp_eq(f64, f64) -> b1 {
+block0(v0: f64, v1: f64):
+    v2 = fcmp eq v0, v1
+    return v2
+}
+
+; run: %fcmp_eq(0x1.0, 0x1.0) == true
+; run: %fcmp_eq(0x1.0, 0x0.0) == false
+
+function %fcmp_ne(f64, f64) -> b1 {
+block0(v0: f64, v1: f64):
+    v2 = fcmp ne v0, v1
+    return v2
+}
+
+; run: %fcmp_ne(0x1.0, 0x1.0) == false
+; run: %fcmp_ne(0x1.0, 0x0.0) == true
+
+function %fcmp_lt(f64, f64) -> b1 {
+block0(v0: f64, v1: f64):
+    v2 = fcmp lt v0, v1
+    return v2
+}
+
+; run: %fcmp_lt(0x1.0, 0x1.0) == false
+; run: %fcmp_lt(0x1.0, 0x0.0) == false
+; run: %fcmp_lt(0x1.0, 0x2.3) == true
+
+function %fcmp_le(f64, f64) -> b1 {
+block0(v0: f64, v1: f64):
+    v2 = fcmp le v0, v1
+    return v2
+}
+
+; run: %fcmp_le(0x1.0, 0x1.0) == true
+; run: %fcmp_le(0x1.0, 0x0.0) == false
+; run: %fcmp_le(0x1.0, 0x2.3) == true
+
+function %fcmp_gt(f64, f64) -> b1 {
+block0(v0: f64, v1: f64):
+    v2 = fcmp gt v0, v1
+    return v2
+}
+
+; run: %fcmp_gt(0x1.0, 0x1.0) == false
+; run: %fcmp_gt(0x1.0, 0x0.0) == true
+; run: %fcmp_gt(0x1.0, 0x2.3) == false
+
+function %fcmp_ge(f64, f64) -> b1 {
+block0(v0: f64, v1: f64):
+    v2 = fcmp ge v0, v1
+    return v2
+}
+
+; run: %fcmp_ge(0x1.0, 0x1.0) == true
+; run: %fcmp_ge(0x1.0, 0x0.0) == true
+; run: %fcmp_ge(0x1.0, 0x2.3) == false