From 1f620e1b465c09a7d7bfd22288d454ef81e35e08 Mon Sep 17 00:00:00 2001 From: Benjamin Bouvier Date: Wed, 20 May 2020 13:31:02 +0200 Subject: [PATCH] cranelift: bump regalloc.rs to 0.0.24 and adapt to latest API changes; --- Cargo.lock | 4 ++-- cranelift/codegen/Cargo.toml | 2 +- cranelift/codegen/src/isa/aarch64/inst/mod.rs | 16 ++++++++-------- cranelift/codegen/src/isa/x64/inst/mod.rs | 16 ++++++++-------- cranelift/codegen/src/machinst/mod.rs | 2 +- cranelift/codegen/src/machinst/vcode.rs | 2 +- 6 files changed, 21 insertions(+), 21 deletions(-) diff --git a/Cargo.lock b/Cargo.lock index 4be5e4c197..33dc454f5f 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -1640,9 +1640,9 @@ dependencies = [ [[package]] name = "regalloc" -version = "0.0.23" +version = "0.0.24" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "b36727ea09f6e363ddebb29b2d2620052267cc1fc6e0da7da63317938eb4104c" +checksum = "5842bece8a4b1690ffa6d9d959081c1d5d851ee4337a36c0a121fafe8c16add2" dependencies = [ "log", "rustc-hash", diff --git a/cranelift/codegen/Cargo.toml b/cranelift/codegen/Cargo.toml index 0bc1c32006..b86453c505 100644 --- a/cranelift/codegen/Cargo.toml +++ b/cranelift/codegen/Cargo.toml @@ -25,7 +25,7 @@ smallvec = { version = "1.0.0" } thiserror = "1.0.4" byteorder = { version = "1.3.2", default-features = false } peepmatic-runtime = { path = "../peepmatic/crates/runtime", optional = true } -regalloc = "0.0.23" +regalloc = "0.0.24" # It is a goal of the cranelift-codegen crate to have minimal external dependencies. # Please don't add any unless they are essential to the task of creating binary # machine code. Integration tests that need external dependencies can be diff --git a/cranelift/codegen/src/isa/aarch64/inst/mod.rs b/cranelift/codegen/src/isa/aarch64/inst/mod.rs index fd910522c5..12291c8c00 100644 --- a/cranelift/codegen/src/isa/aarch64/inst/mod.rs +++ b/cranelift/codegen/src/isa/aarch64/inst/mod.rs @@ -1168,29 +1168,29 @@ fn aarch64_get_regs(inst: &Inst, collector: &mut RegUsageCollector) { //============================================================================= // Instructions: map_regs -fn aarch64_map_regs(inst: &mut Inst, mapper: &RegUsageMapper) { - fn map_use(m: &RegUsageMapper, r: &mut Reg) { +fn aarch64_map_regs(inst: &mut Inst, mapper: &RUM) { + fn map_use(m: &RUM, r: &mut Reg) { if r.is_virtual() { let new = m.get_use(r.to_virtual_reg()).unwrap().to_reg(); *r = new; } } - fn map_def(m: &RegUsageMapper, r: &mut Writable) { + fn map_def(m: &RUM, r: &mut Writable) { if r.to_reg().is_virtual() { let new = m.get_def(r.to_reg().to_virtual_reg()).unwrap().to_reg(); *r = Writable::from_reg(new); } } - fn map_mod(m: &RegUsageMapper, r: &mut Writable) { + fn map_mod(m: &RUM, r: &mut Writable) { if r.to_reg().is_virtual() { let new = m.get_mod(r.to_reg().to_virtual_reg()).unwrap().to_reg(); *r = Writable::from_reg(new); } } - fn map_mem(m: &RegUsageMapper, mem: &mut MemArg) { + fn map_mem(m: &RUM, mem: &mut MemArg) { // N.B.: we take only the pre-map here, but this is OK because the // only addressing modes that update registers (pre/post-increment on // AArch64) both read and write registers, so they are "mods" rather @@ -1219,7 +1219,7 @@ fn aarch64_map_regs(inst: &mut Inst, mapper: &RegUsageMapper) { }; } - fn map_pairmem(m: &RegUsageMapper, mem: &mut PairMemArg) { + fn map_pairmem(m: &RUM, mem: &mut PairMemArg) { match mem { &mut PairMemArg::SignedOffset(ref mut reg, ..) => map_use(m, reg), &mut PairMemArg::PreIndexed(ref mut reg, ..) => map_def(m, reg), @@ -1227,7 +1227,7 @@ fn aarch64_map_regs(inst: &mut Inst, mapper: &RegUsageMapper) { } } - fn map_br(m: &RegUsageMapper, br: &mut CondBrKind) { + fn map_br(m: &RUM, br: &mut CondBrKind) { match br { &mut CondBrKind::Zero(ref mut reg) => map_use(m, reg), &mut CondBrKind::NotZero(ref mut reg) => map_use(m, reg), @@ -1738,7 +1738,7 @@ impl MachInst for Inst { aarch64_get_regs(self, collector) } - fn map_regs(&mut self, mapper: &RegUsageMapper) { + fn map_regs(&mut self, mapper: &RUM) { aarch64_map_regs(self, mapper); } diff --git a/cranelift/codegen/src/isa/x64/inst/mod.rs b/cranelift/codegen/src/isa/x64/inst/mod.rs index a42653915b..1f3eb0a1ed 100644 --- a/cranelift/codegen/src/isa/x64/inst/mod.rs +++ b/cranelift/codegen/src/isa/x64/inst/mod.rs @@ -576,21 +576,21 @@ fn x64_get_regs(inst: &Inst, collector: &mut RegUsageCollector) { //============================================================================= // Instructions and subcomponents: map_regs -fn map_use(m: &RegUsageMapper, r: &mut Reg) { +fn map_use(m: &RUM, r: &mut Reg) { if r.is_virtual() { let new = m.get_use(r.to_virtual_reg()).unwrap().to_reg(); *r = new; } } -fn map_def(m: &RegUsageMapper, r: &mut Writable) { +fn map_def(m: &RUM, r: &mut Writable) { if r.to_reg().is_virtual() { let new = m.get_def(r.to_reg().to_virtual_reg()).unwrap().to_reg(); *r = Writable::from_reg(new); } } -fn map_mod(m: &RegUsageMapper, r: &mut Writable) { +fn map_mod(m: &RUM, r: &mut Writable) { if r.to_reg().is_virtual() { let new = m.get_mod(r.to_reg().to_virtual_reg()).unwrap().to_reg(); *r = Writable::from_reg(new); @@ -598,7 +598,7 @@ fn map_mod(m: &RegUsageMapper, r: &mut Writable) { } impl Addr { - fn map_uses(&mut self, map: &RegUsageMapper) { + fn map_uses(&mut self, map: &RUM) { match self { Addr::IR { simm32: _, @@ -618,7 +618,7 @@ impl Addr { } impl RMI { - fn map_uses(&mut self, map: &RegUsageMapper) { + fn map_uses(&mut self, map: &RUM) { match self { RMI::R { ref mut reg } => map_use(map, reg), RMI::M { ref mut addr } => addr.map_uses(map), @@ -628,7 +628,7 @@ impl RMI { } impl RM { - fn map_uses(&mut self, map: &RegUsageMapper) { + fn map_uses(&mut self, map: &RUM) { match self { RM::R { ref mut reg } => map_use(map, reg), RM::M { ref mut addr } => addr.map_uses(map), @@ -636,7 +636,7 @@ impl RM { } } -fn x64_map_regs(inst: &mut Inst, mapper: &RegUsageMapper) { +fn x64_map_regs(inst: &mut Inst, mapper: &RUM) { // Note this must be carefully synchronized with x64_get_regs. match inst { // ** Nop @@ -739,7 +739,7 @@ impl MachInst for Inst { x64_get_regs(&self, collector) } - fn map_regs(&mut self, mapper: &RegUsageMapper) { + fn map_regs(&mut self, mapper: &RUM) { x64_map_regs(self, mapper); } diff --git a/cranelift/codegen/src/machinst/mod.rs b/cranelift/codegen/src/machinst/mod.rs index 517c3ac81c..8a29b06c0a 100644 --- a/cranelift/codegen/src/machinst/mod.rs +++ b/cranelift/codegen/src/machinst/mod.rs @@ -138,7 +138,7 @@ pub trait MachInst: Clone + Debug { /// Map virtual registers to physical registers using the given virt->phys /// maps corresponding to the program points prior to, and after, this instruction. - fn map_regs(&mut self, maps: &RegUsageMapper); + fn map_regs(&mut self, maps: &RUM); /// If this is a simple move, return the (source, destination) tuple of registers. fn is_move(&self) -> Option<(Writable, Reg)>; diff --git a/cranelift/codegen/src/machinst/vcode.rs b/cranelift/codegen/src/machinst/vcode.rs index d4c13bff0c..ec28d3d2e5 100644 --- a/cranelift/codegen/src/machinst/vcode.rs +++ b/cranelift/codegen/src/machinst/vcode.rs @@ -457,7 +457,7 @@ impl RegallocFunction for VCode { insn.get_regs(collector) } - fn map_regs(insn: &mut I, mapper: &RegUsageMapper) { + fn map_regs(insn: &mut I, mapper: &RUM) { insn.map_regs(mapper); }