Generate register class descriptors.

Add a mechanism for defining sub-classes of register classes.
2017-01-20 11:27:56 -08:00
parent 58c36f71e9
commit 1d21422032
11 changed files with 152 additions and 39 deletions
--- a/lib/cretonne/meta/isa/arm32/registers.py
+++ b/lib/cretonne/meta/isa/arm32/registers.py
@@ -29,7 +29,9 @@ IntRegs = RegBank(
        'General purpose registers',
        units=16, prefix='r')

-GPR = RegClass('GPR', IntRegs)
-S = RegClass('S', FloatRegs, count=32)
-D = RegClass('D', FloatRegs, width=2)
-Q = RegClass('Q', FloatRegs, width=4)
+GPR = RegClass(IntRegs)
+S = RegClass(FloatRegs, count=32)
+D = RegClass(FloatRegs, width=2)
+Q = RegClass(FloatRegs, width=4)
+
+RegClass.extract_names(globals())