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Fix a bug in produces_const (#4709)

Browse Source 
https://github.com/bytecodealliance/wasmtime/pull/4709
This commit is contained in:
Trevor Elliott
2022-08-15 12:00:33 -07:00
committed by GitHub
parent f0c60f46a8
commit 1d0f6fa4fb
1 changed files with 10 additions and 6 deletions
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16
cranelift/codegen/src/isa/x64/inst/mod.rs
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@@ -766,13 +766,13 @@ impl Inst {
/// same as the first register (already handled).
fn produces_const(&self) -> bool {
match self {
Self::AluRmiR { op, src2, dst, .. } => {
src2.clone().to_reg_mem_imm().to_reg() == Some(dst.to_reg().to_reg())
Self::AluRmiR { op, src1, src2, .. } => {
src2.clone().to_reg_mem_imm().to_reg() == Some(src1.to_reg())
&& (*op == AluRmiROpcode::Xor || *op == AluRmiROpcode::Sub)
}
Self::XmmRmR { op, src2, dst, .. } => {
src2.clone().to_reg_mem().to_reg() == Some(dst.to_reg().to_reg())
Self::XmmRmR { op, src1, src2, .. } => {
src2.clone().to_reg_mem().to_reg() == Some(src1.to_reg())
&& (*op == SseOpcode::Xorps
|| *op == SseOpcode::Xorpd
|| *op == SseOpcode::Pxor
@@ -783,9 +783,13 @@ impl Inst {
}
Self::XmmRmRImm {
op, src2, dst, imm, ..
op,
src1,
src2,
imm,
..
} => {
src2.to_reg() == Some(dst.to_reg())
src2.to_reg() == Some(src1.clone())
&& (*op == SseOpcode::Cmppd || *op == SseOpcode::Cmpps)
&& *imm == FcmpImm::Equal.encode()
}