Rename intel to x86.

x86 is the more accurate name, as there are non-Intel x86 implementations.

Fixes #263.

cranelift/filetests/wasm/control.cton

@@ -2,10 +2,10 @@
 test compile
 
 set is_64bit=0
-isa intel haswell
+isa x86 haswell
 
 set is_64bit=1
-isa intel haswell
+isa x86 haswell
 
 function %br_if(i32) -> i32 {
 ebb0(v0: i32):

cranelift/filetests/wasm/conversions.cton

@@ -2,7 +2,7 @@
 test compile
 
 set is_64bit=1
-isa intel haswell
+isa x86 haswell
 
 function %i32_wrap_i64(i64) -> i32 {
 ebb0(v0: i64):

cranelift/filetests/wasm/f32-arith.cton

@@ -2,10 +2,10 @@
 test compile
 
 set is_64bit=0
-isa intel haswell
+isa x86 haswell
 
 set is_64bit=1
-isa intel haswell
+isa x86 haswell
 
 ; Constants.
 

cranelift/filetests/wasm/f32-compares.cton

@@ -2,10 +2,10 @@
 test compile
 
 set is_64bit=0
-isa intel haswell
+isa x86 haswell
 
 set is_64bit=1
-isa intel haswell
+isa x86 haswell
 
 function %f32_eq(f32, f32) -> i32 {
 ebb0(v0: f32, v1: f32):

cranelift/filetests/wasm/f32-memory64.cton

@@ -4,7 +4,7 @@ test compile
 ; We only test on 64-bit since the heap_addr instructions and vmctx parameters
 ; explicitly mention the pointer width.
 set is_64bit=1
-isa intel haswell
+isa x86 haswell
 
 function %f32_load(i32, i64 vmctx) -> f32 {
     gv0 = vmctx

cranelift/filetests/wasm/f64-arith.cton

@@ -2,7 +2,7 @@
 test compile
 
 set is_64bit=1
-isa intel haswell
+isa x86 haswell
 
 ; Constants.
 

cranelift/filetests/wasm/f64-compares.cton

@@ -2,10 +2,10 @@
 test compile
 
 set is_64bit=0
-isa intel haswell
+isa x86 haswell
 
 set is_64bit=1
-isa intel haswell
+isa x86 haswell
 
 function %f64_eq(f64, f64) -> i32 {
 ebb0(v0: f64, v1: f64):

cranelift/filetests/wasm/f64-memory64.cton

@@ -4,7 +4,7 @@ test compile
 ; We only test on 64-bit since the heap_addr instructions and vmctx parameters
 ; explicitly mention the pointer width.
 set is_64bit=1
-isa intel haswell
+isa x86 haswell
 
 function %f64_load(i32, i64 vmctx) -> f64 {
     gv0 = vmctx

cranelift/filetests/wasm/i32-arith.cton

@@ -2,10 +2,10 @@
 test compile
 
 set is_64bit=0
-isa intel haswell
+isa x86 haswell
 
 set is_64bit=1
-isa intel haswell
+isa x86 haswell
 
 ; Constants.
 

cranelift/filetests/wasm/i32-compares.cton

@@ -2,10 +2,10 @@
 test compile
 
 set is_64bit=0
-isa intel haswell
+isa x86 haswell
 
 set is_64bit=1
-isa intel haswell
+isa x86 haswell
 
 function %i32_eqz(i32) -> i32 {
 ebb0(v0: i32):

cranelift/filetests/wasm/i32-memory64.cton

@@ -4,7 +4,7 @@ test compile
 ; We only test on 64-bit since the heap_addr instructions and vmctx parameters
 ; explicitly mention the pointer width.
 set is_64bit=1
-isa intel haswell
+isa x86 haswell
 
 function %i32_load(i32, i64 vmctx) -> i32 {
     gv0 = vmctx

cranelift/filetests/wasm/i64-arith.cton

@@ -2,7 +2,7 @@
 test compile
 
 set is_64bit=1
-isa intel haswell
+isa x86 haswell
 
 ; Constants.
 

cranelift/filetests/wasm/i64-compares.cton

@@ -2,7 +2,7 @@
 test compile
 
 set is_64bit=1
-isa intel haswell
+isa x86 haswell
 
 function %i64_eqz(i64) -> i32 {
 ebb0(v0: i64):

cranelift/filetests/wasm/i64-memory64.cton

@@ -4,7 +4,7 @@ test compile
 ; We only test on 64-bit since the heap_addr instructions and vmctx parameters
 ; explicitly mention the pointer width.
 set is_64bit=1
-isa intel haswell
+isa x86 haswell
 
 function %i64_load(i32, i64 vmctx) -> i64 {
     gv0 = vmctx

cranelift/filetests/wasm/select.cton

@@ -2,10 +2,10 @@
 test compile
 
 set is_64bit=0
-isa intel haswell
+isa x86 haswell
 
 set is_64bit=1
-isa intel haswell
+isa x86 haswell
 
 function %select_i32(i32, i32, i32) -> i32 {
 ebb0(v0: i32, v1: i32, v2: i32):