Implement stack_addr for AArch64

cranelift/codegen/src/machinst/abi.rs

@@ -56,6 +56,9 @@ pub trait ABIBody {
     /// Update with the clobbered registers, post-regalloc.
     fn set_clobbered(&mut self, clobbered: Set<Writable<RealReg>>);
 
+    /// Get the address of a stackslot.
+    fn stackslot_addr(&self, slot: StackSlot, offset: u32, into_reg: Writable<Reg>) -> Self::I;
+
     /// Load from a stackslot.
     fn load_stackslot(
         &self,

cranelift/codegen/src/machinst/lower.rs

@@ -31,6 +31,8 @@ pub trait LowerCtx {
     fn data(&self, ir_inst: Inst) -> &InstructionData;
     /// Get the controlling type for a polymorphic IR instruction.
     fn ty(&self, ir_inst: Inst) -> Type;
+    /// Get the `ABIBody`.
+    fn abi(&mut self) -> &dyn ABIBody<I = Self::I>;
     /// Emit a machine instruction.
     fn emit(&mut self, mach_inst: Self::I);
     /// Indicate that an IR instruction has been merged, and so one of its
@@ -527,6 +529,10 @@ impl<'a, I: VCodeInst> LowerCtx for Lower<'a, I> {
         self.f.dfg.ctrl_typevar(ir_inst)
     }
 
+    fn abi(&mut self) -> &dyn ABIBody<I = I> {
+        self.vcode.abi()
+    }
+
     /// Emit a machine instruction.
     fn emit(&mut self, mach_inst: I) {
         self.vcode.push(mach_inst);