Implement stack_addr for AArch64

cranelift/codegen/src/isa/aarch64/inst/mod.rs

@@ -707,6 +707,12 @@ pub enum Inst {
         srcloc: SourceLoc,
         offset: i64,
     },
+
+    /// Load address referenced by `mem` into `rd`.
+    LoadAddr {
+        rd: Writable<Reg>,
+        mem: MemArg,
+    },
 }
 
 fn count_zero_half_words(mut value: u64) -> usize {
@@ -1089,6 +1095,9 @@ fn aarch64_get_regs(inst: &Inst, collector: &mut RegUsageCollector) {
         &Inst::LoadConst64 { rd, .. } | &Inst::LoadExtName { rd, .. } => {
             collector.add_def(rd);
         }
+        &Inst::LoadAddr { rd, mem: _ } => {
+            collector.add_def(rd);
+        }
     }
 }
 
@@ -1643,6 +1652,13 @@ fn aarch64_map_regs(
         &mut Inst::LoadExtName { ref mut rd, .. } => {
             map_wr(d, rd);
         }
+        &mut Inst::LoadAddr {
+            ref mut rd,
+            ref mut mem,
+        } => {
+            map_wr(d, rd);
+            map_mem(u, mem);
+        }
     }
 }
 
@@ -2536,6 +2552,12 @@ impl ShowWithRRU for Inst {
                 let rd = rd.show_rru(mb_rru);
                 format!("ldr {}, 8 ; b 12 ; data {:?} + {}", rd, name, offset)
             }
+            &Inst::LoadAddr { rd, ref mem } => {
+                let rd = rd.show_rru(mb_rru);
+                let (mem_str, mem) = mem_finalize_for_show(mem, mb_rru);
+                let mem = mem.show_rru(mb_rru);
+                format!("{}load_addr {}, {}", mem_str, rd, mem)
+            }
         }
     }
 }