Implement stack_addr for AArch64
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@@ -6,11 +6,10 @@ use crate::ir::types::*;
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use crate::ir::TrapCode;
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use crate::isa::aarch64::inst::*;
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use core::convert::TryFrom;
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use regalloc::{Reg, RegClass, Writable};
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use alloc::vec::Vec;
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use core::convert::TryFrom;
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/// Memory label/reference finalization: convert a MemLabel to a PC-relative
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/// offset, possibly emitting relocation(s) as necessary.
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@@ -1275,6 +1274,40 @@ impl<O: MachSectionOutput> MachInstEmit<O> for Inst {
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sink.add_reloc(srcloc, Reloc::Abs8, name, offset);
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sink.put8(0);
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}
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&Inst::LoadAddr { rd, ref mem } => match *mem {
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MemArg::FPOffset(fp_off) => {
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let alu_op = if fp_off < 0 {
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ALUOp::Sub64
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} else {
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ALUOp::Add64
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};
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if let Some(imm12) = Imm12::maybe_from_u64(u64::try_from(fp_off.abs()).unwrap())
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{
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let inst = Inst::AluRRImm12 {
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alu_op,
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rd,
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imm12,
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rn: fp_reg(),
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};
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inst.emit(sink);
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} else {
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let tmp = writable_spilltmp_reg();
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let const_insts =
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Inst::load_constant(tmp, u64::try_from(fp_off.abs()).unwrap());
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for inst in const_insts {
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inst.emit(sink);
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}
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let inst = Inst::AluRRR {
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alu_op,
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rd,
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rn: fp_reg(),
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rm: tmp.to_reg(),
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};
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inst.emit(sink);
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}
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}
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_ => unimplemented!("{:?}", mem),
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},
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}
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}
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}
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