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Add the br_icmp instruction.

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This instruction behaves like icmp fused with brnz, and it can be used
to represent fused compare+branch instruction on Intel when optimizing
for macro-op fusion.

RISC-V provides compare-and-branch instructions directly, and it is
needed there too.
This commit is contained in:
Jakob Stoklund Olesen
2017-04-03 13:44:15 -07:00
parent 0530e822d4
commit 1b6a6f4e48
8 changed files with 73 additions and 23 deletions
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8
lib/cretonne/src/verifier.rs
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@@ -218,11 +218,9 @@ impl<'a> Verifier<'a> {
&MultiAry { ref args, .. } => {
self.verify_value_list(inst, args)?;
}
&Jump { destination, ref args, .. } => {
self.verify_ebb(inst, destination)?;
self.verify_value_list(inst, args)?;
}
&Branch { destination, ref args, .. } => {
&Jump { destination, ref args, .. } |
&Branch { destination, ref args, .. } |
&BranchIcmp { destination, ref args, .. } => {
self.verify_ebb(inst, destination)?;
self.verify_value_list(inst, args)?;
}