Add reference types R32 and R64

-Add resumable_trap, safepoint, isnull, and null instructions
-Add Stackmap struct and StackmapSink trait

Co-authored-by: Mir Ahmed <mirahmed753@gmail.com>
Co-authored-by: Dan Gohman <sunfish@mozilla.com>

cranelift/filetests/filetests/safepoint/basic.clif

@@ -0,0 +1,55 @@
+test safepoint
+
+set enable_safepoints=true
+target x86_64
+
+function %test(i32, r64, r64) -> r64 {
+    ebb0(v0: i32, v1:r64, v2:r64):
+        jump ebb1(v0)
+    ebb1(v3: i32):
+        v4 = irsub_imm v3, 1
+        jump ebb2(v4)
+    ebb2(v5: i32):
+        resumable_trap interrupt
+        brz v5, ebb1(v5)
+        v6 = null.r64
+        v7 = is_null v6
+        brnz v7, ebb2(v0)
+        brnz v0, ebb3
+        jump ebb4
+    ebb3:
+        return v1
+    ebb4:
+        return v2
+}
+
+; sameln: function %test(i32 [%rdi], r64 [%rsi], r64 [%rdx]) -> r64 [%rax] fast {
+; nextln: ebb0(v0: i32 [%rdi], v1: r64 [%rsi], v2: r64 [%rdx]):
+; nextln:   v10 = copy v0
+; nextln:   jump ebb1(v10)
+; nextln: 
+; nextln: ebb1(v3: i32 [%rax]):
+; nextln:   v8 = iconst.i32 1
+; nextln:   v4 = isub v8, v3
+; nextln:   jump ebb2(v4)
+; nextln: 
+; nextln: ebb2(v5: i32 [%rcx]):
+; nextln:   safepoint v1, v2
+; nextln:   resumable_trap interrupt
+; nextln:   regmove v5, %rcx -> %rax
+; nextln:   brz v5, ebb1(v5)
+; nextln:   v6 = null.r64 
+; nextln:   v7 = is_null v6
+; nextln:   v9 = copy.i32 v0
+; nextln:   brnz v7, ebb2(v9)
+; nextln:   brnz.i32 v0, ebb3
+; nextln:   jump ebb4
+; nextln: 
+; nextln: ebb3:
+; nextln:   regmove.r64 v1, %rsi -> %rax
+; nextln:   return v1
+; nextln: 
+; nextln: ebb4:
+; nextln:   regmove.r64 v2, %rdx -> %rax
+; nextln:   return v2
+; nextln: }

cranelift/filetests/filetests/safepoint/call.clif

@@ -0,0 +1,52 @@
+test safepoint
+
+set enable_safepoints=true
+target x86_64
+
+function %direct() -> r64 {
+    fn0 = %none()
+    fn1 = %one() -> r64
+    fn2 = %two() -> i32, r64
+
+ebb0:
+    call fn0()
+    v1 = call fn1()
+    v2, v3 = call fn2()
+    brz v2, ebb1 
+    return v1
+ebb1:
+    v4 = call fn1()
+    return v3
+}
+
+; sameln: function %direct() -> r64 [%rax] fast {
+; nextln: ss0 = spill_slot 8
+; nextln: ss1 = spill_slot 8
+; nextln: sig0 = () fast
+; nextln: sig1 = () -> r64 [%rax] fast
+; nextln: sig2 = () -> i32 [%rax], r64 [%rdx] fast
+; nextln: fn0 = %none sig0
+; nextln: fn1 = %one sig1
+; nextln: fn2 = %two sig2
+; nextln: 
+; nextln: ebb0:
+; nextln:   v5 = func_addr.i64 fn0
+; nextln:   call_indirect sig0, v5()
+; nextln:   v6 = func_addr.i64 fn1
+; nextln:   v9 = call_indirect sig1, v6()
+; nextln:   v1 = spill v9
+; nextln:   v7 = func_addr.i64 fn2
+; nextln:   safepoint v1
+; nextln:   v2, v10 = call_indirect sig2, v7()
+; nextln:   v3 = spill v10
+; nextln:   brz v2, ebb1
+; nextln:   v11 = fill v1
+; nextln:   return v11
+; nextln: 
+; nextln: ebb1:
+; nextln:   v8 = func_addr.i64 fn1
+; nextln:   safepoint v3
+; nextln:   v4 = call_indirect sig1, v8()
+; nextln:   v12 = fill.r64 v3
+; nextln:   return v12
+; nextln: }