Add reference types R32 and R64
-Add resumable_trap, safepoint, isnull, and null instructions -Add Stackmap struct and StackmapSink trait Co-authored-by: Mir Ahmed <mirahmed753@gmail.com> Co-authored-by: Dan Gohman <sunfish@mozilla.com>
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@@ -18,10 +18,12 @@ fn gen_recipe(formats: &FormatRegistry, recipe: &EncodingRecipe, fmt: &mut Forma
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let inst_format = formats.get(recipe.format);
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let num_value_ops = inst_format.num_value_operands;
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let want_args = recipe.operands_in.iter().any(|c| match c {
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OperandConstraint::RegClass(_) | OperandConstraint::Stack(_) => true,
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OperandConstraint::FixedReg(_) | OperandConstraint::TiedInput(_) => false,
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});
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// TODO: Set want_args to true for only MultiAry instructions instead of all formats with value list.
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let want_args = inst_format.has_value_list
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|| recipe.operands_in.iter().any(|c| match c {
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OperandConstraint::RegClass(_) | OperandConstraint::Stack(_) => true,
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OperandConstraint::FixedReg(_) | OperandConstraint::TiedInput(_) => false,
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});
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assert!(!want_args || num_value_ops > 0 || inst_format.has_value_list);
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let want_outs = recipe.operands_out.iter().any(|c| match c {
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@@ -159,6 +161,7 @@ fn gen_isa(formats: &FormatRegistry, isa_name: &str, recipes: &Recipes, fmt: &mu
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fmt.line("inst: Inst,");
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fmt.line("_divert: &mut RegDiversions,");
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fmt.line("_sink: &mut CS,");
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fmt.line("_isa: &dyn TargetIsa,");
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});
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fmt.line(") {");
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fmt.indent(|fmt| {
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@@ -176,6 +179,7 @@ fn gen_isa(formats: &FormatRegistry, isa_name: &str, recipes: &Recipes, fmt: &mu
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fmt.line("inst: Inst,");
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fmt.line("divert: &mut RegDiversions,");
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fmt.line("sink: &mut CS,");
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fmt.line("isa: &dyn TargetIsa,")
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});
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fmt.line(") {");
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