Move bitselect->vselect optimization to x64 back-end (#5191)
The simplifier was performing an optimization to replace bitselect with vselect if the all bytes of the condition mask could be shown to be all ones or all zeros. This optimization only ever made any difference in codegen on the x64 target. Therefore, move this optimization to the x64 back-end and perform it in ISLE instead. Resulting codegen should be unchanged, with slightly improved compile time. This also eliminates a few endian-dependent bitcast operations.
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@@ -1255,6 +1255,26 @@
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(b Xmm (sse_and_not ty cond_xmm if_false)))
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(sse_or ty b a)))
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;; If every byte of the condition is guaranteed to be all ones or all zeroes,
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;; we can use x86_blend like vselect does.
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(rule 1 (lower (has_type ty @ (multi_lane _bits _lanes)
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(bitselect condition
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if_true
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if_false)))
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(if (all_ones_or_all_zeros condition))
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(x64_blend ty
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condition
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if_true
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if_false))
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(decl pure all_ones_or_all_zeros (Value) bool)
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(rule (all_ones_or_all_zeros (and (icmp _ _ _) (value_type (multi_lane _ _)))) $true)
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(rule (all_ones_or_all_zeros (and (fcmp _ _ _) (value_type (multi_lane _ _)))) $true)
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(rule (all_ones_or_all_zeros (vconst (vconst_all_ones_or_all_zeros))) $true)
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(decl pure vconst_all_ones_or_all_zeros () Constant)
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(extern extractor vconst_all_ones_or_all_zeros vconst_all_ones_or_all_zeros)
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;;;; Rules for `vselect` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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(rule (lower (has_type ty @ (multi_lane _bits _lanes)
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@@ -713,6 +713,15 @@ impl Context for IsleContext<'_, '_, MInst, Flags, IsaFlags, 6> {
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targets.len() as u32
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}
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#[inline]
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fn vconst_all_ones_or_all_zeros(&mut self, constant: Constant) -> Option<()> {
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let const_data = self.lower_ctx.get_constant_data(constant);
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if const_data.iter().all(|&b| b == 0 || b == 0xFF) {
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return Some(());
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}
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None
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}
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#[inline]
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fn fcvt_uint_mask_const(&mut self) -> VCodeConstant {
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self.lower_ctx
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