Compute register class intersections.

Ensure that the set of register classes is closed under intersection.

Provide a RegClass::intersect() method which finds the register class
representing the intersection of two classes.

Generate a bit-mask of subclasses for each register class to be used by
the intersect() method.

Ensure that register classes are sorted topologically. This is also used
by the intersect() method.

lib/cretonne/meta/cdsl/isa.py

@@ -51,6 +51,7 @@ class TargetISA(object):
         """
         self._collect_encoding_recipes()
         self._collect_predicates()
+        self._collect_regclasses()
         return self
 
     def _collect_encoding_recipes(self):
@@ -96,6 +97,18 @@ class TargetISA(object):
                 if enc.isap:
                     self.settings.number_predicate(enc.isap)
 
+    def _collect_regclasses(self):
+        """
+        Collect and number register classes.
+
+        Every register class needs a unique index, and the classes need to be
+        topologically ordered.
+        """
+        rc_index = 0
+        for bank in self.regbanks:
+            bank.finish_regclasses(rc_index)
+            rc_index += len(bank.classes)
+
 
 class CPUMode(object):
     """