[AArch64] Port atomic rmw to ISLE (#4021)

Also fix and extend the current implementation:
- AtomicRMWOp::Clr != AtomicRmwOp::And, as the input needs to be
  inverted first.
- Inputs to the cmp for the RMWLoop case are sign-extended when
  needed.
- Lower Xchg to Swp.
- Lower Sub to Add with a negated input.
- Added more runtests.

Copyright (c) 2022, Arm Limited.

cranelift/filetests/filetests/runtests/atomic-cas-subword-little.clif

@@ -0,0 +1,49 @@
+test run
+target s390x
+target aarch64
+target aarch64 has_lse
+target x86_64
+
+; We can't test that these instructions are right regarding atomicity, but we can
+; test if they perform their operation correctly
+
+function %atomic_cas_little_i16(i32, i64, i16, i16) -> i32 {
+    ss0 = explicit_slot 4
+
+block0(v0: i32, v1: i64, v2: i16, v3: i16):
+    v4 = stack_addr.i64 ss0
+    store.i32 little v0, v4
+
+    v5 = iadd.i64 v4, v1
+    v6 = atomic_cas.i16 little v5, v2, v3
+
+    v7 = load.i32 little v4
+    return v7
+}
+; run: %atomic_cas_little_i16(0x12345678, 2, 0x1234, 0xabcd) == 0xabcd5678
+; run: %atomic_cas_little_i16(0x12345678, 2, 0x4321, 0xabcd) == 0x12345678
+; run: %atomic_cas_little_i16(0x12345678, 0, 0x5678, 0xabcd) == 0x1234abcd
+; run: %atomic_cas_little_i16(0x12345678, 0, 0x8765, 0xabcd) == 0x12345678
+
+function %atomic_cas_little_i8(i32, i64, i8, i8) -> i32 {
+    ss0 = explicit_slot 4
+
+block0(v0: i32, v1: i64, v2: i8, v3: i8):
+    v4 = stack_addr.i64 ss0
+    store.i32 little v0, v4
+
+    v5 = iadd.i64 v4, v1
+    v6 = atomic_cas.i8 little v5, v2, v3
+
+    v7 = load.i32 little v4
+    return v7
+}
+; run: %atomic_cas_little_i8(0x12345678, 3, 0x12, 0xab) == 0xab345678
+; run: %atomic_cas_little_i8(0x12345678, 3, 0x21, 0xab) == 0x12345678
+; run: %atomic_cas_little_i8(0x12345678, 2, 0x34, 0xab) == 0x12ab5678
+; run: %atomic_cas_little_i8(0x12345678, 2, 0x43, 0xab) == 0x12345678
+; run: %atomic_cas_little_i8(0x12345678, 1, 0x56, 0xab) == 0x1234ab78
+; run: %atomic_cas_little_i8(0x12345678, 1, 0x65, 0xab) == 0x12345678
+; run: %atomic_cas_little_i8(0x12345678, 0, 0x78, 0xab) == 0x123456ab
+; run: %atomic_cas_little_i8(0x12345678, 0, 0x87, 0xab) == 0x12345678
+