[AArch64] Port atomic rmw to ISLE (#4021)

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Also fix and extend the current implementation:
- AtomicRMWOp::Clr != AtomicRmwOp::And, as the input needs to be
  inverted first.
- Inputs to the cmp for the RMWLoop case are sign-extended when
  needed.
- Lower Xchg to Swp.
- Lower Sub to Add with a negated input.
- Added more runtests.

Copyright (c) 2022, Arm Limited.

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This commit is contained in:

Sam Parker

2022-04-27 21:13:59 +01:00

committed by GitHub

parent 8381179503

commit 12b4374cd5

26 changed files with 1632 additions and 1281 deletions

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cranelift/codegen/src/isa/aarch64/lower/isle/generated_code.rs generated

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