[AArch64] Port atomic rmw to ISLE (#4021)

Also fix and extend the current implementation:
- AtomicRMWOp::Clr != AtomicRmwOp::And, as the input needs to be
  inverted first.
- Inputs to the cmp for the RMWLoop case are sign-extended when
  needed.
- Lower Xchg to Swp.
- Lower Sub to Add with a negated input.
- Added more runtests.

Copyright (c) 2022, Arm Limited.

cranelift/codegen/src/isa/aarch64/lower/isle/generated_code.manifest

@@ -1,4 +1,4 @@
 src/clif.isle 443b34b797fc8ace
-src/prelude.isle d8a93eb727abd7f4
-src/isa/aarch64/inst.isle 77984cc33a05be7
-src/isa/aarch64/lower.isle 71c7e603b0e4bdef
+src/prelude.isle a7915a6b88310eb5
+src/isa/aarch64/inst.isle a2c0ae729bfa24a8
+src/isa/aarch64/lower.isle 15641ca7f0ac061a