aarch64: Initial work to transition backend to ISLE (#3541)
* aarch64: Initial work to transition backend to ISLE This commit is what is hoped to be the initial commit towards migrating the aarch64 backend to ISLE. There's seemingly a lot of changes here but it's intended to largely be code motion. The current thinking is to closely follow the x64 backend for how all this is handled and organized. Major changes in this PR are: * The `Inst` enum is now defined in ISLE. This avoids having to define it in two places (once in Rust and once in ISLE). I've preserved all the comments in the ISLE and otherwise this isn't actually a functional change from the Rust perspective, it's still the same enum according to Rust. * Lots of little enums and things were moved to ISLE as well. As with `Inst` their definitions didn't change, only where they're defined. This will give future ISLE PRs access to all these operations. * Initial code for lowering `iconst`, `null`, and `bconst` are implemented. Ironically none of this is actually used right now because constant lowering is handled in `put_input_in_regs` which specially handles constants. Nonetheless I wanted to get at least something simple working which shows off how to special case various things that are specific to AArch64. In a future PR I plan to hook up const-lowering in ISLE to this path so even though `iconst`-the-clif-instruction is never lowered this should use the const lowering defined in ISLE rather than elsewhere in the backend (eventually leading to the deletion of the non-ISLE lowering). * The `IsleContext` skeleton is created and set up for future additions. * Some code for ISLE that's shared across all backends now lives in `isle_prelude_methods!()` and is deduplicated between the AArch64 backend and the x64 backend. * Register mapping is tweaked to do the same thing for AArch64 that it does for x64. Namely mapping virtual registers is supported instead of just virtual to machine registers. My main goal with this PR was to get AArch64 into a place where new instructions can be added with relative ease. Additionally I'm hoping to figure out as part of this change how much to share for ISLE between AArch64 and x64 (and other backends). * Don't use priorities with rules * Update .gitattributes with concise syntax * Deduplicate some type definitions * Rebuild ISLE * Move isa::isle to machinst::isle
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@@ -73,7 +73,7 @@ pub enum ConsumesFlags {
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}
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/// Internal type ExtendKind: defined at src/isa/x64/inst.isle line 433.
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#[derive(Clone, Debug)]
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#[derive(Copy, Clone, Debug, PartialEq, Eq)]
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pub enum ExtendKind {
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Sign,
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Zero,
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@@ -82,7 +82,7 @@ pub enum ExtendKind {
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// Generated as internal constructor for term temp_reg.
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pub fn constructor_temp_reg<C: Context>(ctx: &mut C, arg0: Type) -> Option<Reg> {
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let pattern0_0 = arg0;
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// Rule at src/prelude.isle line 57.
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// Rule at src/prelude.isle line 60.
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let expr0_0 = C::temp_writable_reg(ctx, pattern0_0);
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let expr1_0 = C::writable_reg_to_reg(ctx, expr0_0);
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return Some(expr1_0);
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@@ -91,7 +91,7 @@ pub fn constructor_temp_reg<C: Context>(ctx: &mut C, arg0: Type) -> Option<Reg>
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// Generated as internal constructor for term lo_reg.
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pub fn constructor_lo_reg<C: Context>(ctx: &mut C, arg0: Value) -> Option<Reg> {
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let pattern0_0 = arg0;
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// Rule at src/prelude.isle line 92.
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// Rule at src/prelude.isle line 95.
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let expr0_0 = C::put_in_regs(ctx, pattern0_0);
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let expr1_0: usize = 0;
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let expr2_0 = C::value_regs_get(ctx, expr0_0, expr1_0);
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