Remove support for entity variables in filecheck.
Now that the parser doesn't renumber indices, there's no need for entity variables like $v0.
This commit is contained in:
@@ -26,11 +26,11 @@ ebb1(v91: i32):
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jump ebb0(v91)
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}
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; sameln: function %onearg(i32) native {
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; nextln: ebb0($v90: i32):
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; nextln: jump ebb1($v90)
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; nextln: ebb0(v90: i32):
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; nextln: jump ebb1(v90)
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; nextln:
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; nextln: ebb1($v91: i32):
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; nextln: jump ebb0($v91)
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; nextln: ebb1(v91: i32):
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; nextln: jump ebb0(v91)
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; nextln: }
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; Jumps with 2 args.
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@@ -42,11 +42,11 @@ ebb1(v92: i32, v93: f32):
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jump ebb0(v92, v93)
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}
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; sameln: function %twoargs(i32, f32) native {
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; nextln: ebb0($v90: i32, $v91: f32):
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; nextln: jump ebb1($v90, $v91)
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; nextln: ebb0(v90: i32, v91: f32):
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; nextln: jump ebb1(v90, v91)
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; nextln:
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; nextln: ebb1($v92: i32, $v93: f32):
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; nextln: jump ebb0($v92, $v93)
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; nextln: ebb1(v92: i32, v93: f32):
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; nextln: jump ebb0(v92, v93)
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; nextln: }
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; Branches with no arguments. The '()' empty argument list is optional.
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@@ -58,11 +58,11 @@ ebb1:
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brnz v90, ebb1()
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}
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; sameln: function %minimal(i32) native {
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; nextln: ebb0($v90: i32):
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; nextln: brz $v90, ebb1
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; nextln: ebb0(v90: i32):
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; nextln: brz v90, ebb1
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; nextln:
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; nextln: ebb1:
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; nextln: brnz.i32 $v90, ebb1
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; nextln: brnz.i32 v90, ebb1
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; nextln: }
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function %twoargs(i32, f32) {
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@@ -73,11 +73,11 @@ ebb1(v92: i32, v93: f32):
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brnz v90, ebb0(v92, v93)
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}
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; sameln: function %twoargs(i32, f32) native {
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; nextln: ebb0($v90: i32, $v91: f32):
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; nextln: brz $v90, ebb1($v90, $v91)
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; nextln: ebb0(v90: i32, v91: f32):
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; nextln: brz v90, ebb1(v90, v91)
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; nextln:
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; nextln: ebb1($v92: i32, $v93: f32):
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; nextln: brnz.i32 $v90, ebb0($v92, $v93)
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; nextln: ebb1(v92: i32, v93: f32):
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; nextln: brnz.i32 v90, ebb0(v92, v93)
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; nextln: }
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function %jumptable(i32) {
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@@ -97,8 +97,8 @@ ebb40:
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; sameln: function %jumptable(i32) native {
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; check: jt2 = jump_table 0, 0, ebb10, ebb40, ebb20, ebb30
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; check: jt200 = jump_table 0
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; check: ebb10($v3: i32):
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; nextln: br_table $v3, jt2
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; check: ebb10(v3: i32):
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; nextln: br_table v3, jt2
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; nextln: trap user1
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; nextln:
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; nextln: ebb20:
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@@ -18,9 +18,9 @@ ebb1:
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}
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; sameln: function %r1() -> i32, f32 spiderwasm {
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; nextln: ebb1:
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; nextln: $v1 = iconst.i32 3
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; nextln: $v2 = f32const 0.0
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; nextln: return $v1, $v2
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; nextln: v1 = iconst.i32 3
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; nextln: v2 = f32const 0.0
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; nextln: return v1, v2
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; nextln: }
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function %signatures() {
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@@ -30,11 +30,11 @@ function %signatures() {
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fn8 = function %bar(i32) -> b1
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}
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; sameln: function %signatures() native {
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; check: $sig10 = () native
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; check: $sig11 = (i32, f64) -> i32, b1 spiderwasm
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; check: sig10 = () native
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; check: sig11 = (i32, f64) -> i32, b1 spiderwasm
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; check: sig12 = (i32) -> b1 native
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; check: $fn5 = $sig11 %foo
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; check: $fn8 = sig12 %bar
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; check: fn5 = sig11 %foo
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; check: fn8 = sig12 %bar
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; check: }
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function %direct() {
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@@ -48,9 +48,9 @@ ebb0:
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v2, v3 = call fn2()
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return
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}
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; check: call $fn0()
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; check: $v1 = call $fn1()
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; check: $v2, $v3 = call $fn2()
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; check: call fn0()
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; check: v1 = call fn1()
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; check: v2, v3 = call fn2()
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; check: return
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function %indirect(i64) {
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@@ -64,9 +64,9 @@ ebb0(v0: i64):
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v3, v4 = call_indirect sig2, v1()
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return
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}
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; check: $v1 = call_indirect $sig1, $v0()
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; check: call_indirect $sig0, $v1($v0)
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; check: $v3, $v4 = call_indirect $sig2, $v1()
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; check: v1 = call_indirect sig1, v0()
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; check: call_indirect sig0, v1(v0)
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; check: v3, v4 = call_indirect sig2, v1()
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; check: return
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function %long_call() {
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@@ -78,8 +78,8 @@ ebb0:
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call_indirect sig0, v0()
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return
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}
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; check: $v0 = func_addr.i32 $fn0
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; check: call_indirect $sig0, $v0()
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; check: v0 = func_addr.i32 fn0
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; check: call_indirect sig0, v0()
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; check: return
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; Special purpose function arguments
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@@ -88,6 +88,6 @@ ebb0(v1: i32, v2: i32, v3: i32, v4: i32):
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return v4, v2, v3, v1
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}
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; check: function %special1(i32 sret, i32 fp, i32 csr, i32 link) -> i32 link, i32 fp, i32 csr, i32 sret native {
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; check: ebb0($v1: i32, $v2: i32, $v3: i32, $v4: i32):
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; check: return $v4, $v2, $v3, $v1
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; check: ebb0(v1: i32, v2: i32, v3: i32, v4: i32):
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; check: return v4, v2, v3, v1
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; check: }
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@@ -18,11 +18,11 @@ ebb201:
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ebb202:
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trap oob
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}
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; check: $v1 = ifcmp_imm $v0, 17
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; check: brif eq $v1, $ebb201
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; check: brif ugt $v1, $ebb202
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; check: $v3 = ifcmp $v0, $v2
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; check: $v4 = trueif eq $v3
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; check: v1 = ifcmp_imm v0, 17
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; check: brif eq v1, ebb201
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; check: brif ugt v1, ebb202
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; check: v3 = ifcmp v0, v2
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; check: v4 = trueif eq v3
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function %fflags(f32) {
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ebb200(v0: f32):
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@@ -40,7 +40,7 @@ ebb201:
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ebb202:
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trap oob
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}
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; check: $v2 = ffcmp $v0, $v1
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; check: brff eq $v2, $ebb201
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; check: brff ord $v2, $ebb202
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; check: $v3 = trueff gt $v2
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; check: v2 = ffcmp v0, v1
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; check: brff eq v2, ebb201
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; check: brff ord v2, ebb202
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; check: v3 = trueff gt v2
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@@ -14,11 +14,11 @@ ebb1(v0: i32 [%x8], v1: i32):
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@a5 [Iret#5] return v0, v8
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}
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; sameln: function %foo(i32, i32) native {
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; nextln: $ebb1($v0: i32 [%x8], $v1: i32):
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; nextln: [-,-]$WS $v2 = iadd $v0, $v1
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; nextln: ebb1(v0: i32 [%x8], v1: i32):
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; nextln: [-,-]$WS v2 = iadd v0, v1
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; nextln: [-]$WS trap heap_oob
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; nextln: [R#1234,%x5,%x11]$WS $v6, $v7 = iadd_cout $v2, $v0
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; nextln: [Rshamt#beef,%x25]$WS $v8 = ishl_imm $v6, 2
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; nextln: @0055 [-,-]$WS $v9 = iadd $v8, $v7
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; nextln: @00a5 [Iret#05]$WS return $v0, $v8
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; nextln: [R#1234,%x5,%x11]$WS v6, v7 = iadd_cout v2, v0
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; nextln: [Rshamt#beef,%x25]$WS v8 = ishl_imm v6, 2
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; nextln: @0055 [-,-]$WS v9 = iadd v8, v7
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; nextln: @00a5 [Iret#05]$WS return v0, v8
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; nextln: }
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@@ -3,34 +3,34 @@ test verifier
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function %vmglobal() -> i32 {
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gv3 = vmctx+16
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; check: $gv3 = vmctx+16
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; check: gv3 = vmctx+16
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gv4 = vmctx+0
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; check: $gv4 = vmctx
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; check: gv4 = vmctx
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; not: +0
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gv5 = vmctx -256
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; check: $gv5 = vmctx-256
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; check: gv5 = vmctx-256
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ebb0:
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v1 = global_addr.i32 gv3
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; check: $v1 = global_addr.i32 $gv3
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; check: v1 = global_addr.i32 gv3
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return v1
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}
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function %deref() -> i32 {
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gv3 = vmctx+16
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gv4 = deref(gv3)-32
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; check: $gv4 = deref($gv3)-32
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; check: gv4 = deref(gv3)-32
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ebb0:
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v1 = global_addr.i32 gv4
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; check: $v1 = global_addr.i32 $gv4
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; check: v1 = global_addr.i32 gv4
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return v1
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}
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; Refer to a global variable before it's been declared.
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function %backref() -> i32 {
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gv1 = deref(gv2)-32
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; check: $gv1 = deref($gv2)-32
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; check: gv1 = deref(gv2)-32
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gv2 = vmctx+16
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; check: $gv2 = vmctx+16
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; check: gv2 = vmctx+16
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ebb0:
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v1 = global_addr.i32 gv1
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return v1
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@@ -38,14 +38,14 @@ ebb0:
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function %sym() -> i32 {
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gv0 = globalsym %something
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; check: $gv0 = globalsym %something
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; check: gv0 = globalsym %something
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gv1 = globalsym u8:9
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; check: $gv1 = globalsym u8:9
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; check: gv1 = globalsym u8:9
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ebb0:
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v0 = global_addr.i32 gv0
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; check: $v0 = global_addr.i32 $gv0
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; check: v0 = global_addr.i32 gv0
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v1 = global_addr.i32 gv1
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; check: $v1 = global_addr.i32 $gv1
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; check: v1 = global_addr.i32 gv1
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v2 = bxor v0, v1
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return v2
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}
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@@ -56,11 +56,11 @@ function %sheap(i32) -> i64 {
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heap2 = static gv5, guard 0x1000, bound 0x1_0000
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gv5 = vmctx+64
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; check: $heap1 = static reserved_reg, min 0x0001_0000, bound 0x0001_0000_0000, guard 0x8000_0000
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; check: $heap2 = static $gv5, min 0, bound 0x0001_0000, guard 4096
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; check: heap1 = static reserved_reg, min 0x0001_0000, bound 0x0001_0000_0000, guard 0x8000_0000
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; check: heap2 = static gv5, min 0, bound 0x0001_0000, guard 4096
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ebb0(v1: i32):
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v2 = heap_addr.i64 heap1, v1, 0
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; check: $v2 = heap_addr.i64 $heap1, $v1, 0
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; check: v2 = heap_addr.i64 heap1, v1, 0
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return v2
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}
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@@ -71,10 +71,10 @@ function %dheap(i32) -> i64 {
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gv5 = vmctx+64
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gv6 = vmctx+72
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; check: $heap1 = dynamic reserved_reg, min 0x0001_0000, bound $gv6, guard 0x8000_0000
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; check: $heap2 = dynamic $gv5, min 0, bound $gv6, guard 4096
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; check: heap1 = dynamic reserved_reg, min 0x0001_0000, bound gv6, guard 0x8000_0000
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; check: heap2 = dynamic gv5, min 0, bound gv6, guard 4096
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ebb0(v1: i32):
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v2 = heap_addr.i64 heap2, v1, 0
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; check: $v2 = heap_addr.i64 $heap2, $v1, 0
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; check: v2 = heap_addr.i64 heap2, v1, 0
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return v2
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}
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@@ -1,14 +1,8 @@
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; The .cton parser can't preserve the actual entity numbers in the input file
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; since entities are numbered as they are created. For entities declared in the
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; preamble, this is no problem, but for EBB and value references, mapping
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; source numbers to real numbers can be a problem.
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;
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; It is possible to refer to instructions and EBBs that have not yet been
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; defined in the lexical order, so the parser needs to rewrite these references
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; after the fact.
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; defined in the lexical order.
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test cat
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; Check that defining numbers are rewritten.
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; Defining numbers.
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function %defs() {
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ebb100(v20: i32):
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v1000 = iconst.i32x8 5
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@@ -16,9 +10,9 @@ ebb100(v20: i32):
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trap user4
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}
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; sameln: function %defs() native {
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; nextln: $ebb100($v20: i32):
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; nextln: $v1000 = iconst.i32x8 5
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; nextln: $v9200 = f64const 0x1.0000000000000p2
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; nextln: ebb100(v20: i32):
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; nextln: v1000 = iconst.i32x8 5
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; nextln: v9200 = f64const 0x1.0000000000000p2
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; nextln: trap user4
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; nextln: }
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@@ -30,8 +24,8 @@ ebb100(v20: i32):
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jump ebb100(v1000)
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}
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; sameln: function %use_value() native {
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; nextln: ebb100($v20: i32):
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; nextln: $v1000 = iadd_imm $v20, 5
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; nextln: $v200 = iadd $v20, $v1000
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; nextln: jump ebb100($v1000)
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; nextln: ebb100(v20: i32):
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; nextln: v1000 = iadd_imm v20, 5
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; nextln: v200 = iadd v20, v1000
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; nextln: jump ebb100(v1000)
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; nextln: }
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@@ -4,21 +4,21 @@ test verifier
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function %add_i96(i32, i32, i32, i32, i32, i32) -> i32, i32, i32 {
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ebb1(v1: i32, v2: i32, v3: i32, v4: i32, v5: i32, v6: i32):
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v10, v11 = iadd_cout v1, v4
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;check: $v10, $v11 = iadd_cout $v1, $v4
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;check: v10, v11 = iadd_cout v1, v4
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v20, v21 = iadd_carry v2, v5, v11
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; check: $v20, $v21 = iadd_carry $v2, $v5, $v11
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; check: v20, v21 = iadd_carry v2, v5, v11
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v30 = iadd_cin v3, v6, v21
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; check: $v30 = iadd_cin $v3, $v6, $v21
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; check: v30 = iadd_cin v3, v6, v21
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return v10, v20, v30
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}
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function %sub_i96(i32, i32, i32, i32, i32, i32) -> i32, i32, i32 {
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ebb1(v1: i32, v2: i32, v3: i32, v4: i32, v5: i32, v6: i32):
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v10, v11 = isub_bout v1, v4
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;check: $v10, $v11 = isub_bout $v1, $v4
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;check: v10, v11 = isub_bout v1, v4
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v20, v21 = isub_borrow v2, v5, v11
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; check: $v20, $v21 = isub_borrow $v2, $v5, $v11
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; check: v20, v21 = isub_borrow v2, v5, v11
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v30 = isub_bin v3, v6, v21
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; check: $v30 = isub_bin $v3, $v6, $v21
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; check: v30 = isub_bin v3, v6, v21
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return v10, v20, v30
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}
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@@ -20,9 +20,9 @@ ebb0:
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}
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; sameln: function %ivalues() native {
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; nextln: ebb0:
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; nextln: $v0 = iconst.i32 2
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; nextln: $v1 = iconst.i8 6
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; nextln: $v2 = ishl $v0, $v1
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; nextln: v0 = iconst.i32 2
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; nextln: v1 = iconst.i8 6
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; nextln: v2 = ishl v0, v1
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; nextln: }
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; Create and use values.
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@@ -36,10 +36,10 @@ ebb0:
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}
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; sameln: function %bvalues() native {
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; nextln: ebb0:
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; nextln: $v0 = bconst.b32 true
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; nextln: $v1 = bconst.b8 false
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; nextln: $v2 = bextend.b32 v1
|
||||
; nextln: $v3 = bxor v0, v2
|
||||
; nextln: v0 = bconst.b32 true
|
||||
; nextln: v1 = bconst.b8 false
|
||||
; nextln: v2 = bextend.b32 v1
|
||||
; nextln: v3 = bxor v0, v2
|
||||
; nextln: }
|
||||
|
||||
; Polymorphic instruction controlled by second operand.
|
||||
@@ -48,8 +48,8 @@ ebb0(v90: i32, v91: i32, v92: b1):
|
||||
v0 = select v92, v90, v91
|
||||
}
|
||||
; sameln: function %select() native {
|
||||
; nextln: ebb0($v90: i32, $v91: i32, $v92: b1):
|
||||
; nextln: $v0 = select $v92, $v90, $v91
|
||||
; nextln: ebb0(v90: i32, v91: i32, v92: b1):
|
||||
; nextln: v0 = select v92, v90, v91
|
||||
; nextln: }
|
||||
|
||||
; Polymorphic instruction controlled by third operand.
|
||||
@@ -71,9 +71,9 @@ ebb0:
|
||||
}
|
||||
; sameln: function %lanes() native {
|
||||
; nextln: ebb0:
|
||||
; nextln: $v0 = iconst.i32x4 2
|
||||
; nextln: $v1 = extractlane $v0, 3
|
||||
; nextln: $v2 = insertlane $v0, 1, $v1
|
||||
; nextln: v0 = iconst.i32x4 2
|
||||
; nextln: v1 = extractlane v0, 3
|
||||
; nextln: v2 = insertlane v0, 1, v1
|
||||
; nextln: }
|
||||
|
||||
; Integer condition codes.
|
||||
@@ -86,12 +86,12 @@ ebb0(v90: i32, v91: i32):
|
||||
br_icmp eq v90, v91, ebb0(v91, v90)
|
||||
}
|
||||
; sameln: function %icmp(i32, i32) native {
|
||||
; nextln: ebb0($v90: i32, $v91: i32):
|
||||
; nextln: $v0 = icmp eq $v90, $v91
|
||||
; nextln: $v1 = icmp ult $v90, $v91
|
||||
; nextln: $v2 = icmp_imm sge $v90, -12
|
||||
; nextln: $v3 = irsub_imm $v91, 45
|
||||
; nextln: br_icmp eq $v90, $v91, ebb0($v91, $v90)
|
||||
; nextln: ebb0(v90: i32, v91: i32):
|
||||
; nextln: v0 = icmp eq v90, v91
|
||||
; nextln: v1 = icmp ult v90, v91
|
||||
; nextln: v2 = icmp_imm sge v90, -12
|
||||
; nextln: v3 = irsub_imm v91, 45
|
||||
; nextln: br_icmp eq v90, v91, ebb0(v91, v90)
|
||||
; nextln: }
|
||||
|
||||
; Floating condition codes.
|
||||
@@ -102,10 +102,10 @@ ebb0(v90: f32, v91: f32):
|
||||
v2 = fcmp lt v90, v91
|
||||
}
|
||||
; sameln: function %fcmp(f32, f32) native {
|
||||
; nextln: ebb0($v90: f32, $v91: f32):
|
||||
; nextln: $v0 = fcmp eq $v90, $v91
|
||||
; nextln: $v1 = fcmp uno $v90, $v91
|
||||
; nextln: $v2 = fcmp lt $v90, $v91
|
||||
; nextln: ebb0(v90: f32, v91: f32):
|
||||
; nextln: v0 = fcmp eq v90, v91
|
||||
; nextln: v1 = fcmp uno v90, v91
|
||||
; nextln: v2 = fcmp lt v90, v91
|
||||
; nextln: }
|
||||
|
||||
; The bitcast instruction has two type variables: The controlling type variable
|
||||
@@ -116,9 +116,9 @@ ebb0(v90: i32, v91: f32):
|
||||
v1 = bitcast.i32 v91
|
||||
}
|
||||
; sameln: function %bitcast(i32, f32) native {
|
||||
; nextln: ebb0($v90: i32, $v91: f32):
|
||||
; nextln: $v0 = bitcast.i8x4 $v90
|
||||
; nextln: $v1 = bitcast.i32 $v91
|
||||
; nextln: ebb0(v90: i32, v91: f32):
|
||||
; nextln: v0 = bitcast.i8x4 v90
|
||||
; nextln: v1 = bitcast.i32 v91
|
||||
; nextln: }
|
||||
|
||||
; Stack slot references
|
||||
@@ -136,17 +136,17 @@ ebb0:
|
||||
stack_store v2, ss2
|
||||
}
|
||||
; sameln: function %stack() native {
|
||||
; check: $ss2 = local 4
|
||||
; check: $ss3 = incoming_arg 4, offset 8
|
||||
; check: $ss4 = outgoing_arg 4
|
||||
; check: $ss5 = emergency_slot 4
|
||||
; check: $ss10 = spill_slot 8
|
||||
; check: ss2 = local 4
|
||||
; check: ss3 = incoming_arg 4, offset 8
|
||||
; check: ss4 = outgoing_arg 4
|
||||
; check: ss5 = emergency_slot 4
|
||||
; check: ss10 = spill_slot 8
|
||||
|
||||
; check: ebb0:
|
||||
; nextln: $v1 = stack_load.i32 $ss10
|
||||
; nextln: $v2 = stack_load.i32 $ss10+4
|
||||
; nextln: stack_store $v1, $ss10+2
|
||||
; nextln: stack_store $v2, $ss2
|
||||
; nextln: v1 = stack_load.i32 ss10
|
||||
; nextln: v2 = stack_load.i32 ss10+4
|
||||
; nextln: stack_store v1, ss10+2
|
||||
; nextln: stack_store v2, ss2
|
||||
|
||||
; Memory access instructions.
|
||||
function %memory(i32) {
|
||||
@@ -163,17 +163,17 @@ ebb0(v1: i32):
|
||||
store notrap aligned v3, v1-12
|
||||
}
|
||||
; sameln: function %memory(i32) native {
|
||||
; nextln: ebb0($v1: i32):
|
||||
; nextln: $v2 = load.i64 $v1
|
||||
; nextln: $v3 = load.i64 aligned $v1
|
||||
; nextln: $v4 = load.i64 notrap $v1
|
||||
; nextln: $v5 = load.i64 notrap aligned $v1
|
||||
; nextln: $v6 = load.i64 notrap aligned $v1
|
||||
; nextln: $v7 = load.i64 $v1-12
|
||||
; nextln: $v8 = load.i64 notrap $v1+0x0001_0000
|
||||
; nextln: store $v2, $v1
|
||||
; nextln: store aligned $v3, $v1+12
|
||||
; nextln: store notrap aligned $v3, $v1-12
|
||||
; nextln: ebb0(v1: i32):
|
||||
; nextln: v2 = load.i64 v1
|
||||
; nextln: v3 = load.i64 aligned v1
|
||||
; nextln: v4 = load.i64 notrap v1
|
||||
; nextln: v5 = load.i64 notrap aligned v1
|
||||
; nextln: v6 = load.i64 notrap aligned v1
|
||||
; nextln: v7 = load.i64 v1-12
|
||||
; nextln: v8 = load.i64 notrap v1+0x0001_0000
|
||||
; nextln: store v2, v1
|
||||
; nextln: store aligned v3, v1+12
|
||||
; nextln: store notrap aligned v3, v1-12
|
||||
|
||||
; Register diversions.
|
||||
; This test file has no ISA, so we can unly use register unit numbers.
|
||||
@@ -188,12 +188,12 @@ ebb0(v1: i32):
|
||||
return
|
||||
}
|
||||
; sameln: function %diversion(i32) native {
|
||||
; nextln: $ss0 = spill_slot 4
|
||||
; check: ebb0($v1: i32):
|
||||
; nextln: regmove $v1, %10 -> %20
|
||||
; nextln: regmove $v1, %20 -> %10
|
||||
; nextln: regspill $v1, %10 -> $ss0
|
||||
; nextln: regfill $v1, $ss0 -> %10
|
||||
; nextln: ss0 = spill_slot 4
|
||||
; check: ebb0(v1: i32):
|
||||
; nextln: regmove v1, %10 -> %20
|
||||
; nextln: regmove v1, %20 -> %10
|
||||
; nextln: regspill v1, %10 -> ss0
|
||||
; nextln: regfill v1, ss0 -> %10
|
||||
; nextln: return
|
||||
; nextln: }
|
||||
|
||||
@@ -222,12 +222,12 @@ ebb0(v0: i32):
|
||||
return
|
||||
}
|
||||
; sameln: function %cond_traps(i32)
|
||||
; nextln: ebb0($v0: i32):
|
||||
; nextln: trapz $v0, stk_ovf
|
||||
; nextln: $v1 = ifcmp_imm v0, 5
|
||||
; nextln: trapif ugt $v1, oob
|
||||
; nextln: $v2 = bitcast.f32 $v1
|
||||
; nextln: $v3 = ffcmp $v2, $v2
|
||||
; nextln: trapff uno $v3, int_ovf
|
||||
; nextln: ebb0(v0: i32):
|
||||
; nextln: trapz v0, stk_ovf
|
||||
; nextln: v1 = ifcmp_imm v0, 5
|
||||
; nextln: trapif ugt v1, oob
|
||||
; nextln: v2 = bitcast.f32 v1
|
||||
; nextln: v3 = ffcmp v2, v2
|
||||
; nextln: trapff uno v3, int_ovf
|
||||
; nextln: return
|
||||
; nextln: }
|
||||
|
||||
Reference in New Issue
Block a user