Fix some i128 shift-related bugs in x64 backend.
This fixes #2672 and #2679, and also fixes an incorrect instruction emission (`test` with small immediate) that we had missed earlier. The shift-related fixes have to do with (i) shifts by 0 bits, as a special case that must be handled; and (ii) shifts by a 128-bit amount, which we can handle by just dropping the upper half (we only use 3--7 bits of shift amount). This adjusts the lowerings appropriately, and also adds run-tests to ensure that the lowerings actually execute correctly (previously we only had compile-tests with golden lowerings; I'd like to correct this for more ops eventually, adding run-tests beyond what the Wasm spec and frontend covers).
This commit is contained in:
Chris Fallin
@@ -644,212 +644,9 @@ block0(v0: i128):
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; nextln: ret
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}
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function %f21(i128, i32) -> i128 {
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; check: pushq %rbp
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; nextln: movq %rsp, %rbp
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; Shifts are covered by run-tests in shift-i128-run.clif.
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block0(v0: i128, v1: i32):
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v2 = ushr v0, v1
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return v2
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; check: movq %rdi, %rax
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; nextln: movq %rsi, %rdi
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; nextln: movq %rdi, %rsi
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; nextln: movq %rdx, %rcx
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; nextln: shrq %cl, %rsi
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; nextln: movq %rdx, %rcx
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; nextln: shrq %cl, %rax
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; nextln: movl $$64, %ecx
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; nextln: subq %rdx, %rcx
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; nextln: shlq %cl, %rdi
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; nextln: orq %rax, %rdi
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; nextln: xorq %rax, %rax
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; nextln: xorq %rcx, %rcx
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; nextln: andq $$64, %rdx
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; nextln: cmovzq %rsi, %rax
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; nextln: cmovzq %rdi, %rcx
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; nextln: cmovnzq %rsi, %rcx
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; nextln: movq %rax, %rdx
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; nextln: movq %rcx, %rax
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; nextln: movq %rbp, %rsp
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; nextln: popq %rbp
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; nextln: ret
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}
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function %f22(i128, i32) -> i128 {
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; check: pushq %rbp
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; nextln: movq %rsp, %rbp
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block0(v0: i128, v1: i32):
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v2 = ishl v0, v1
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return v2
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; check: movq %rsi, %rax
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; nextln: movq %rdi, %rsi
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; nextln: movq %rdx, %rcx
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; nextln: shlq %cl, %rsi
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; nextln: movq %rdx, %rcx
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; nextln: shlq %cl, %rax
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; nextln: movl $$64, %ecx
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; nextln: subq %rdx, %rcx
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; nextln: shrq %cl, %rdi
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; nextln: orq %rax, %rdi
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; nextln: xorq %rax, %rax
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; nextln: xorq %rcx, %rcx
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; nextln: andq $$64, %rdx
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; nextln: cmovzq %rdi, %rcx
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; nextln: cmovzq %rsi, %rax
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; nextln: cmovnzq %rsi, %rcx
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; nextln: movq %rcx, %rdx
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; nextln: movq %rbp, %rsp
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; nextln: popq %rbp
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; nextln: ret
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}
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function %f23(i128, i32) -> i128 {
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; check: pushq %rbp
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; nextln: movq %rsp, %rbp
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block0(v0: i128, v1: i32):
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v2 = sshr v0, v1
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return v2
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; check: movq %rdi, %r8
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; nextln: movq %rsi, %rdi
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; nextln: movq %rdi, %rsi
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; nextln: movq %rdx, %rcx
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; nextln: sarq %cl, %rsi
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; nextln: movq %rdx, %rcx
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; nextln: sarq %cl, %r8
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; nextln: movl $$64, %ecx
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; nextln: subq %rdx, %rcx
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; nextln: movq %rdi, %rax
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; nextln: shlq %cl, %rax
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; nextln: orq %r8, %rax
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; nextln: sarq $$63, %rdi
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; nextln: xorq %rcx, %rcx
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; nextln: andq $$64, %rdx
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; nextln: cmovzq %rsi, %rdi
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; nextln: cmovzq %rax, %rcx
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; nextln: cmovnzq %rsi, %rcx
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; nextln: movq %rcx, %rax
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; nextln: movq %rdi, %rdx
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; nextln: movq %rbp, %rsp
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; nextln: popq %rbp
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; nextln: ret
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}
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function %f24(i128, i32) -> i128 {
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; check: pushq %rbp
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; nextln: movq %rsp, %rbp
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block0(v0: i128, v1: i32):
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v2 = rotr.i128 v0, v1
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return v2
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; check: movq %rsi, %r9
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; nextln: movq %rdx, %rcx
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; nextln: shrq %cl, %r9
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; nextln: movq %rdi, %rax
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; nextln: movq %rdx, %rcx
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; nextln: shrq %cl, %rax
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; nextln: movl $$64, %ecx
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; nextln: subq %rdx, %rcx
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; nextln: movq %rsi, %r10
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; nextln: shlq %cl, %r10
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; nextln: orq %rax, %r10
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; nextln: xorq %r8, %r8
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; nextln: xorq %rax, %rax
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; nextln: movq %rdx, %rcx
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; nextln: andq $$64, %rcx
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; nextln: cmovzq %r9, %r8
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; nextln: cmovzq %r10, %rax
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; nextln: cmovnzq %r9, %rax
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; nextln: movl $$128, %r9d
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; nextln: subq %rdx, %r9
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; nextln: movq %rdi, %rdx
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; nextln: movq %r9, %rcx
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; nextln: shlq %cl, %rdx
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; nextln: movq %r9, %rcx
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; nextln: shlq %cl, %rsi
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; nextln: movl $$64, %ecx
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; nextln: subq %r9, %rcx
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; nextln: movq %rdi, %r10
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; nextln: shrq %cl, %r10
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; nextln: orq %rsi, %r10
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; nextln: xorq %rsi, %rsi
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; nextln: xorq %rdi, %rdi
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; nextln: andq $$64, %r9
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; nextln: cmovzq %r10, %rdi
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; nextln: cmovzq %rdx, %rsi
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; nextln: cmovnzq %rdx, %rdi
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; nextln: orq %rax, %rsi
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; nextln: orq %r8, %rdi
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; nextln: movq %rsi, %rax
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; nextln: movq %rdi, %rdx
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; nextln: movq %rbp, %rsp
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; nextln: popq %rbp
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; nextln: ret
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}
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function %f25(i128, i32) -> i128 {
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; check: pushq %rbp
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; nextln: movq %rsp, %rbp
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block0(v0: i128, v1: i32):
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v2 = rotl.i128 v0, v1
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return v2
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; check: movq %rdi, %r9
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; nextln: movq %rdx, %rcx
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; nextln: shlq %cl, %r9
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; nextln: movq %rsi, %rax
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; nextln: movq %rdx, %rcx
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; nextln: shlq %cl, %rax
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; nextln: movl $$64, %ecx
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; nextln: subq %rdx, %rcx
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; nextln: movq %rdi, %r10
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; nextln: shrq %cl, %r10
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; nextln: orq %rax, %r10
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; nextln: xorq %r8, %r8
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; nextln: xorq %rax, %rax
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; nextln: movq %rdx, %rcx
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; nextln: andq $$64, %rcx
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; nextln: cmovzq %r10, %rax
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; nextln: cmovzq %r9, %r8
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; nextln: cmovnzq %r9, %rax
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; nextln: movl $$128, %r9d
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; nextln: subq %rdx, %r9
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; nextln: movq %rsi, %rdx
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; nextln: movq %r9, %rcx
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; nextln: shrq %cl, %rdx
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; nextln: movq %r9, %rcx
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; nextln: shrq %cl, %rdi
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; nextln: movl $$64, %ecx
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; nextln: subq %r9, %rcx
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; nextln: shlq %cl, %rsi
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; nextln: orq %rdi, %rsi
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; nextln: xorq %rdi, %rdi
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; nextln: xorq %rcx, %rcx
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; nextln: andq $$64, %r9
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; nextln: cmovzq %rdx, %rdi
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; nextln: cmovzq %rsi, %rcx
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; nextln: cmovnzq %rdx, %rcx
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; nextln: orq %r8, %rcx
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; nextln: orq %rax, %rdi
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; nextln: movq %rcx, %rax
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; nextln: movq %rdi, %rdx
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; nextln: movq %rbp, %rsp
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; nextln: popq %rbp
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; nextln: ret
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}
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function %f26(i128, i64) {
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function %f21(i128, i64) {
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; check: pushq %rbp
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; nextln: movq %rsp, %rbp
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@@ -865,7 +662,7 @@ block0(v0: i128, v1: i64):
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; nextln: ret
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}
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function %f27(i64) -> i128 {
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function %f22(i64) -> i128 {
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; check: pushq %rbp
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; nextln: movq %rsp, %rbp
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@@ -883,7 +680,7 @@ block0(v0: i64):
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; nextln: ret
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}
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function %f28(i128, b1) -> i128 {
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function %f23(i128, b1) -> i128 {
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block0(v0: i128, v1: b1):
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v2 = iconst.i128 0
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brnz v1, block1(v2)
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@@ -930,7 +727,7 @@ block2(v6: i128):
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}
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function %f29(i128, i128, i64, i128, i128, i128) -> i128 {
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function %f24(i128, i128, i64, i128, i128, i128) -> i128 {
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block0(v0: i128, v1: i128, v2: i64, v3: i128, v4: i128, v5: i128):
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v6 = iadd.i128 v0, v1
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@@ -974,7 +771,7 @@ block0(v0: i128, v1: i128, v2: i64, v3: i128, v4: i128, v5: i128):
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}
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function %f30(i128) -> i128, i128, i128, i64, i128, i128 {
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function %f25(i128) -> i128, i128, i128, i64, i128, i128 {
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; check: pushq %rbp
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; nextln: movq %rsp, %rbp
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@@ -996,7 +793,7 @@ block0(v0: i128):
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}
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function %f31(i128, i128) -> i128, i128 {
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function %f26(i128, i128) -> i128, i128 {
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fn0 = %g(i128, i128) -> i128, i128
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block0(v0: i128, v1: i128):
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v2, v3 = call fn0(v0, v1)
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@@ -1027,7 +824,7 @@ block0(v0: i128, v1: i128):
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}
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function %f32(i128) -> i128 {
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function %f27(i128) -> i128 {
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block0(v0: i128):
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v1 = clz.i128 v0
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return v1
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@@ -1056,7 +853,7 @@ block0(v0: i128):
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}
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function %f33(i128) -> i128 {
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function %f28(i128) -> i128 {
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block0(v0: i128):
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v1 = ctz.i128 v0
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return v1
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@@ -1080,3 +877,18 @@ block0(v0: i128):
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; nextln: movq %rbp, %rsp
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; nextln: popq %rbp
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; nextln: ret
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function %f29(i8, i128) -> i8 {
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block0(v0: i8, v1: i128):
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v2 = ishl v0, v1
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return v2
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}
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; check: pushq %rbp
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; nextln: movq %rsp, %rbp
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; nextln: movq %rsi, %rcx
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; nextln: shll %cl, %edi
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; nextln: movq %rdi, %rax
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; nextln: movq %rbp, %rsp
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; nextln: popq %rbp
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; nextln: ret
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