From 0c7316ae28d17f436e5c362a259bdd1c94180228 Mon Sep 17 00:00:00 2001 From: Dan Gohman Date: Mon, 19 Jun 2017 16:24:10 -0700 Subject: [PATCH] Lint fixes (#99) * Replace a single-character string literal with a character literal. * Use is_some() instead of comparing with Some(_). * Add code-quotes around type names in comments. * Use !...is_empty() instead of len() != 0. * Tidy up redundant returns. * Remove redundant .clone() calls. * Remove unnecessary explicit lifetime parameters. * Tidy up unnecessary '&'s. * Add parens to make operator precedence explicit. * Use debug_assert_eq instead of debug_assert with ==. * Replace a &Vec argument with a &[...]. * Replace `a = a op b` with `a op= b`. * Avoid unnecessary closures. * Avoid .iter() and .iter_mut() for iterating over containers. * Remove unneeded qualification. --- lib/cretonne/src/context.rs | 2 +- lib/cretonne/src/ir/condcodes.rs | 52 ++++++++-------- lib/cretonne/src/ir/dfg.rs | 13 ++-- lib/cretonne/src/ir/extfunc.rs | 2 +- lib/cretonne/src/ir/immediates.rs | 4 +- lib/cretonne/src/ir/instructions.rs | 28 ++++----- lib/cretonne/src/ir/jumptable.rs | 2 +- lib/cretonne/src/ir/valueloc.rs | 8 +-- lib/cretonne/src/isa/intel/binemit.rs | 6 +- lib/cretonne/src/licm.rs | 29 ++++----- lib/cretonne/src/regalloc/allocatable_set.rs | 6 +- lib/cretonne/src/regalloc/pressure.rs | 4 +- lib/cretonne/src/regalloc/reload.rs | 2 +- lib/cretonne/src/regalloc/spilling.rs | 2 +- lib/cretonne/src/result.rs | 3 +- lib/cretonne/src/simple_gvn.rs | 4 +- lib/cretonne/src/topo_order.rs | 2 +- lib/cretonne/src/verifier/mod.rs | 64 ++++++++++---------- lib/filecheck/src/checker.rs | 6 +- lib/filecheck/src/lib.rs | 4 +- lib/reader/src/isaspec.rs | 2 +- lib/reader/src/lexer.rs | 16 ++--- lib/reader/src/parser.rs | 6 +- lib/reader/src/sourcemap.rs | 2 +- 24 files changed, 132 insertions(+), 137 deletions(-) diff --git a/lib/cretonne/src/context.rs b/lib/cretonne/src/context.rs index 90c4948b40..5e23ed3efc 100644 --- a/lib/cretonne/src/context.rs +++ b/lib/cretonne/src/context.rs @@ -60,7 +60,7 @@ impl Context { /// /// The `isa` argument is currently unused, but the verifier will soon be able to also /// check ISA-dependent constraints. - pub fn verify<'a>(&self, isa: Option<&TargetIsa>) -> verifier::Result { + pub fn verify(&self, isa: Option<&TargetIsa>) -> verifier::Result { verifier::verify_context(&self.func, &self.cfg, &self.domtree, isa) } diff --git a/lib/cretonne/src/ir/condcodes.rs b/lib/cretonne/src/ir/condcodes.rs index 520014471d..f63bd60938 100644 --- a/lib/cretonne/src/ir/condcodes.rs +++ b/lib/cretonne/src/ir/condcodes.rs @@ -88,17 +88,17 @@ impl CondCode for IntCC { impl Display for IntCC { fn fmt(&self, f: &mut Formatter) -> fmt::Result { use self::IntCC::*; - f.write_str(match self { - &Equal => "eq", - &NotEqual => "ne", - &SignedGreaterThan => "sgt", - &SignedGreaterThanOrEqual => "sge", - &SignedLessThan => "slt", - &SignedLessThanOrEqual => "sle", - &UnsignedGreaterThan => "ugt", - &UnsignedGreaterThanOrEqual => "uge", - &UnsignedLessThan => "ult", - &UnsignedLessThanOrEqual => "ule", + f.write_str(match *self { + Equal => "eq", + NotEqual => "ne", + SignedGreaterThan => "sgt", + SignedGreaterThanOrEqual => "sge", + SignedLessThan => "slt", + SignedLessThanOrEqual => "sle", + UnsignedGreaterThan => "ugt", + UnsignedGreaterThanOrEqual => "uge", + UnsignedLessThan => "ult", + UnsignedLessThanOrEqual => "ule", }) } } @@ -219,21 +219,21 @@ impl CondCode for FloatCC { impl Display for FloatCC { fn fmt(&self, f: &mut Formatter) -> fmt::Result { use self::FloatCC::*; - f.write_str(match self { - &Ordered => "ord", - &Unordered => "uno", - &Equal => "eq", - &NotEqual => "ne", - &OrderedNotEqual => "one", - &UnorderedOrEqual => "ueq", - &LessThan => "lt", - &LessThanOrEqual => "le", - &GreaterThan => "gt", - &GreaterThanOrEqual => "ge", - &UnorderedOrLessThan => "ult", - &UnorderedOrLessThanOrEqual => "ule", - &UnorderedOrGreaterThan => "ugt", - &UnorderedOrGreaterThanOrEqual => "uge", + f.write_str(match *self { + Ordered => "ord", + Unordered => "uno", + Equal => "eq", + NotEqual => "ne", + OrderedNotEqual => "one", + UnorderedOrEqual => "ueq", + LessThan => "lt", + LessThanOrEqual => "le", + GreaterThan => "gt", + GreaterThanOrEqual => "ge", + UnorderedOrLessThan => "ult", + UnorderedOrLessThanOrEqual => "ule", + UnorderedOrGreaterThan => "ugt", + UnorderedOrGreaterThanOrEqual => "uge", }) } } diff --git a/lib/cretonne/src/ir/dfg.rs b/lib/cretonne/src/ir/dfg.rs index 36607e76f1..40f209a49b 100644 --- a/lib/cretonne/src/ir/dfg.rs +++ b/lib/cretonne/src/ir/dfg.rs @@ -247,10 +247,11 @@ impl DataFlowGraph { // Try to create short alias chains by finding the original source value. // This also avoids the creation of loops. let original = self.resolve_aliases(src); - assert!(dest != original, - "Aliasing {} to {} would create a loop", - dest, - src); + assert_ne!(dest, + original, + "Aliasing {} to {} would create a loop", + dest, + src); let ty = self.value_type(original); assert_eq!(self.value_type(dest), ty, @@ -326,8 +327,8 @@ pub enum ValueDef { impl ValueDef { /// Unwrap the instruction where the value was defined, or panic. pub fn unwrap_inst(&self) -> Inst { - match self { - &ValueDef::Res(inst, _) => inst, + match *self { + ValueDef::Res(inst, _) => inst, _ => panic!("Value is not an instruction result"), } } diff --git a/lib/cretonne/src/ir/extfunc.rs b/lib/cretonne/src/ir/extfunc.rs index e0863f8d1d..57346df5f2 100644 --- a/lib/cretonne/src/ir/extfunc.rs +++ b/lib/cretonne/src/ir/extfunc.rs @@ -70,7 +70,7 @@ impl Signature { pub struct DisplaySignature<'a>(&'a Signature, Option<&'a RegInfo>); fn write_list(f: &mut fmt::Formatter, - args: &Vec, + args: &[ArgumentType], regs: Option<&RegInfo>) -> fmt::Result { match args.split_first() { diff --git a/lib/cretonne/src/ir/immediates.rs b/lib/cretonne/src/ir/immediates.rs index 44c4cd3fc3..fa6185cb8b 100644 --- a/lib/cretonne/src/ir/immediates.rs +++ b/lib/cretonne/src/ir/immediates.rs @@ -314,7 +314,7 @@ fn format_float(bits: u64, w: u8, t: u8, f: &mut Formatter) -> fmt::Result { let max_e_bits = (1u64 << w) - 1; let t_bits = bits & ((1u64 << t) - 1); // Trailing significand. let e_bits = (bits >> t) & max_e_bits; // Biased exponent. - let sign_bit = (bits >> w + t) & 1; + let sign_bit = (bits >> (w + t)) & 1; let bias: i32 = (1 << (w - 1)) - 1; let e = e_bits as i32 - bias; // Unbiased exponent. @@ -381,7 +381,7 @@ fn parse_float(s: &str, w: u8, t: u8) -> Result { debug_assert!((t + w + 1).is_power_of_two(), "Unexpected IEEE format size"); let (sign_bit, s2) = if s.starts_with('-') { - (1u64 << t + w, &s[1..]) + (1u64 << (t + w), &s[1..]) } else if s.starts_with('+') { (0, &s[1..]) } else { diff --git a/lib/cretonne/src/ir/instructions.rs b/lib/cretonne/src/ir/instructions.rs index 66c6d039b0..ad4dd6fa21 100644 --- a/lib/cretonne/src/ir/instructions.rs +++ b/lib/cretonne/src/ir/instructions.rs @@ -286,23 +286,23 @@ impl InstructionData { /// Any instruction that can transfer control to another EBB reveals its possible destinations /// here. pub fn analyze_branch<'a>(&'a self, pool: &'a ValueListPool) -> BranchInfo<'a> { - match self { - &InstructionData::Jump { + match *self { + InstructionData::Jump { destination, ref args, .. - } => BranchInfo::SingleDest(destination, &args.as_slice(pool)), - &InstructionData::Branch { + } => BranchInfo::SingleDest(destination, args.as_slice(pool)), + InstructionData::Branch { destination, ref args, .. } => BranchInfo::SingleDest(destination, &args.as_slice(pool)[1..]), - &InstructionData::BranchIcmp { + InstructionData::BranchIcmp { destination, ref args, .. } => BranchInfo::SingleDest(destination, &args.as_slice(pool)[2..]), - &InstructionData::BranchTable { table, .. } => BranchInfo::Table(table), + InstructionData::BranchTable { table, .. } => BranchInfo::Table(table), _ => BranchInfo::NotABranch, } } @@ -312,10 +312,10 @@ impl InstructionData { /// /// Multi-destination branches like `br_table` return `None`. pub fn branch_destination(&self) -> Option { - match self { - &InstructionData::Jump { destination, .. } => Some(destination), - &InstructionData::Branch { destination, .. } => Some(destination), - &InstructionData::BranchIcmp { destination, .. } => Some(destination), + match *self { + InstructionData::Jump { destination, .. } => Some(destination), + InstructionData::Branch { destination, .. } => Some(destination), + InstructionData::BranchIcmp { destination, .. } => Some(destination), _ => None, } } @@ -337,11 +337,11 @@ impl InstructionData { /// /// Any instruction that can call another function reveals its call signature here. pub fn analyze_call<'a>(&'a self, pool: &'a ValueListPool) -> CallInfo<'a> { - match self { - &InstructionData::Call { func_ref, ref args, .. } => { - CallInfo::Direct(func_ref, &args.as_slice(pool)) + match *self { + InstructionData::Call { func_ref, ref args, .. } => { + CallInfo::Direct(func_ref, args.as_slice(pool)) } - &InstructionData::IndirectCall { sig_ref, ref args, .. } => { + InstructionData::IndirectCall { sig_ref, ref args, .. } => { CallInfo::Indirect(sig_ref, &args.as_slice(pool)[1..]) } _ => CallInfo::NotACall, diff --git a/lib/cretonne/src/ir/jumptable.rs b/lib/cretonne/src/ir/jumptable.rs index dd9bc5c187..24dad02056 100644 --- a/lib/cretonne/src/ir/jumptable.rs +++ b/lib/cretonne/src/ir/jumptable.rs @@ -65,7 +65,7 @@ impl JumpTableData { /// Enumerate over all `(idx, dest)` pairs in the table in order. /// /// This returns an iterator that skips any empty slots in the table. - pub fn entries<'a>(&'a self) -> Entries { + pub fn entries(&self) -> Entries { Entries(self.table.iter().cloned().enumerate()) } diff --git a/lib/cretonne/src/ir/valueloc.rs b/lib/cretonne/src/ir/valueloc.rs index b664fe70e5..8c5ea50dfa 100644 --- a/lib/cretonne/src/ir/valueloc.rs +++ b/lib/cretonne/src/ir/valueloc.rs @@ -98,16 +98,16 @@ impl Default for ArgumentLoc { impl ArgumentLoc { /// Is this an assigned location? (That is, not `Unassigned`). pub fn is_assigned(&self) -> bool { - match self { - &ArgumentLoc::Unassigned => false, + match *self { + ArgumentLoc::Unassigned => false, _ => true, } } /// Is this a register location? pub fn is_reg(&self) -> bool { - match self { - &ArgumentLoc::Reg(_) => true, + match *self { + ArgumentLoc::Reg(_) => true, _ => false, } } diff --git a/lib/cretonne/src/isa/intel/binemit.rs b/lib/cretonne/src/isa/intel/binemit.rs index 834a9848c3..87587463ca 100644 --- a/lib/cretonne/src/isa/intel/binemit.rs +++ b/lib/cretonne/src/isa/intel/binemit.rs @@ -10,13 +10,13 @@ pub static RELOC_NAMES: [&'static str; 1] = ["Call"]; // Emit single-byte opcode. fn put_op1(bits: u16, sink: &mut CS) { - debug_assert!(bits & 0x0f00 == 0, "Invalid encoding bits for Op1*"); + debug_assert_eq!(bits & 0x0f00, 0, "Invalid encoding bits for Op1*"); sink.put1(bits as u8); } // Emit two-byte opcode: 0F XX fn put_op2(bits: u16, sink: &mut CS) { - debug_assert!(bits & 0x0f00 == 0x0400, "Invalid encoding bits for Op2*"); + debug_assert_eq!(bits & 0x0f00, 0x0400, "Invalid encoding bits for Op2*"); sink.put1(0x0f); sink.put1(bits as u8); } @@ -26,7 +26,7 @@ const PREFIX: [u8; 3] = [0x66, 0xf3, 0xf2]; // Emit single-byte opcode with mandatory prefix. fn put_mp1(bits: u16, sink: &mut CS) { - debug_assert!(bits & 0x0c00 == 0, "Invalid encoding bits for Mp1*"); + debug_assert_eq!(bits & 0x0c00, 0, "Invalid encoding bits for Mp1*"); let pp = (bits >> 8) & 3; sink.put1(PREFIX[(pp - 1) as usize]); sink.put1(bits as u8); diff --git a/lib/cretonne/src/licm.rs b/lib/cretonne/src/licm.rs index 0fc8212460..10e0558999 100644 --- a/lib/cretonne/src/licm.rs +++ b/lib/cretonne/src/licm.rs @@ -21,18 +21,13 @@ pub fn do_licm(func: &mut Function, let invariant_inst = remove_loop_invariant_instructions(lp, func, cfg, loop_analysis); // Then we create the loop's pre-header and fill it with the invariant instructions // Then we remove the invariant instructions from the loop body - if invariant_inst.len() > 0 { + if !invariant_inst.is_empty() { // If the loop has a natural pre-header we use it, otherwise we create it. let mut pos; - match has_pre_header(&func.layout, - cfg, - domtree, - loop_analysis.loop_header(lp).clone()) { + match has_pre_header(&func.layout, cfg, domtree, loop_analysis.loop_header(lp)) { None => { - let pre_header = create_pre_header(loop_analysis.loop_header(lp).clone(), - func, - cfg, - domtree); + let pre_header = + create_pre_header(loop_analysis.loop_header(lp), func, cfg, domtree); pos = Cursor::new(&mut func.layout); pos.goto_bottom(pre_header); pos.prev_inst(); @@ -47,7 +42,7 @@ pub fn do_licm(func: &mut Function, // The last instruction of the pre-header is the termination instruction (usually // a jump) so we need to insert just before this. for inst in invariant_inst { - pos.insert_inst(inst.clone()); + pos.insert_inst(inst); } } } @@ -146,7 +141,7 @@ fn remove_loop_invariant_instructions(lp: Loop, for ebb in postorder_ebbs_loop(loop_analysis, cfg, lp).iter().rev() { // Arguments of the EBB are loop values for val in func.dfg.ebb_args(*ebb) { - loop_values.insert(val.clone()); + loop_values.insert(*val); } pos.goto_top(*ebb); while let Some(inst) = pos.next_inst() { @@ -164,7 +159,7 @@ fn remove_loop_invariant_instructions(lp: Loop, // If the instruction is not loop-invariant we push its results in the set of // loop values for out in func.dfg.inst_results(inst) { - loop_values.insert(out.clone()); + loop_values.insert(*out); } } } @@ -176,7 +171,7 @@ fn remove_loop_invariant_instructions(lp: Loop, fn postorder_ebbs_loop(loop_analysis: &LoopAnalysis, cfg: &ControlFlowGraph, lp: Loop) -> Vec { let mut grey = HashSet::new(); let mut black = HashSet::new(); - let mut stack = vec![loop_analysis.loop_header(lp).clone()]; + let mut stack = vec![loop_analysis.loop_header(lp)]; let mut postorder = Vec::new(); while !stack.is_empty() { @@ -187,13 +182,13 @@ fn postorder_ebbs_loop(loop_analysis: &LoopAnalysis, cfg: &ControlFlowGraph, lp: stack.push(node); // Get any children we've never seen before. for child in cfg.get_successors(node) { - if loop_analysis.is_in_loop(child.clone(), lp) && !grey.contains(child) { - stack.push(child.clone()); + if loop_analysis.is_in_loop(*child, lp) && !grey.contains(child) { + stack.push(*child); } } } else if !black.contains(&node) { - postorder.push(node.clone()); - black.insert(node.clone()); + postorder.push(node); + black.insert(node); } } postorder diff --git a/lib/cretonne/src/regalloc/allocatable_set.rs b/lib/cretonne/src/regalloc/allocatable_set.rs index 6ad8019ba9..aecd338e7f 100644 --- a/lib/cretonne/src/regalloc/allocatable_set.rs +++ b/lib/cretonne/src/regalloc/allocatable_set.rs @@ -50,14 +50,14 @@ impl AllocatableSet { /// It is an error to take a register that doesn't have all of its register units available. pub fn take(&mut self, rc: RegClass, reg: RegUnit) { let (idx, bits) = bitmask(rc, reg); - debug_assert!((self.avail[idx] & bits) == bits, "Not available"); + debug_assert_eq!(self.avail[idx] & bits, bits, "Not available"); self.avail[idx] &= !bits; } /// Make `reg` available for allocation again. pub fn free(&mut self, rc: RegClass, reg: RegUnit) { let (idx, bits) = bitmask(rc, reg); - debug_assert!((self.avail[idx] & bits) == 0, "Not allocated"); + debug_assert_eq!(self.avail[idx] & bits, 0, "Not allocated"); self.avail[idx] |= bits; } @@ -118,7 +118,7 @@ impl Iterator for RegSetIter { let unit = unit_offset + word.trailing_zeros() as RegUnit; // Clear that lowest bit so we won't find it again. - *word = *word & (*word - 1); + *word &= *word - 1; return Some(unit); } diff --git a/lib/cretonne/src/regalloc/pressure.rs b/lib/cretonne/src/regalloc/pressure.rs index 1398bff8d6..4839c7451a 100644 --- a/lib/cretonne/src/regalloc/pressure.rs +++ b/lib/cretonne/src/regalloc/pressure.rs @@ -199,7 +199,7 @@ impl Pressure { /// Reset all counts to 0, both base and transient. pub fn reset(&mut self) { - for e in self.toprc.iter_mut() { + for e in &mut self.toprc { e.base_count = 0; e.transient_count = 0; } @@ -220,7 +220,7 @@ impl Pressure { /// Reset all transient counts to 0. pub fn reset_transient(&mut self) { - for e in self.toprc.iter_mut() { + for e in &mut self.toprc { e.transient_count = 0; } } diff --git a/lib/cretonne/src/regalloc/reload.rs b/lib/cretonne/src/regalloc/reload.rs index 2226566799..e8327b5a73 100644 --- a/lib/cretonne/src/regalloc/reload.rs +++ b/lib/cretonne/src/regalloc/reload.rs @@ -233,7 +233,7 @@ impl<'a> Context<'a> { // Create a live range for the new reload. let affinity = Affinity::Reg(cand.regclass.into()); self.liveness.create_dead(reg, dfg.value_def(reg), affinity); - self.liveness.extend_locally(reg, ebb, inst, &pos.layout); + self.liveness.extend_locally(reg, ebb, inst, pos.layout); } // Rewrite arguments. diff --git a/lib/cretonne/src/regalloc/spilling.rs b/lib/cretonne/src/regalloc/spilling.rs index f21e6e6c1a..7311de5d5d 100644 --- a/lib/cretonne/src/regalloc/spilling.rs +++ b/lib/cretonne/src/regalloc/spilling.rs @@ -226,7 +226,7 @@ impl<'a> Context<'a> { // Add register def to pressure, spill if needed. while let Err(mask) = self.pressure.take_transient(op.regclass) { dbg!("Need {} reg from {} throughs", op.regclass, throughs.len()); - self.spill_from(mask, throughs, dfg, &pos.layout); + self.spill_from(mask, throughs, dfg, pos.layout); } } } diff --git a/lib/cretonne/src/result.rs b/lib/cretonne/src/result.rs index 6605f1daff..960bd021d4 100644 --- a/lib/cretonne/src/result.rs +++ b/lib/cretonne/src/result.rs @@ -3,7 +3,6 @@ use verifier; use std::error::Error as StdError; use std::fmt; -use std::result; /// A compilation error. /// @@ -32,7 +31,7 @@ pub enum CtonError { } /// A Cretonne compilation result. -pub type CtonResult = result::Result<(), CtonError>; +pub type CtonResult = Result<(), CtonError>; impl fmt::Display for CtonError { fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result { diff --git a/lib/cretonne/src/simple_gvn.rs b/lib/cretonne/src/simple_gvn.rs index e8f89f4a1b..bb339fbd4d 100644 --- a/lib/cretonne/src/simple_gvn.rs +++ b/lib/cretonne/src/simple_gvn.rs @@ -16,7 +16,7 @@ fn trivially_unsafe_for_gvn(opcode: Opcode) -> bool { pub fn do_simple_gvn(func: &mut Function, cfg: &mut ControlFlowGraph) { let mut visible_values: HashMap = HashMap::new(); - let domtree = DominatorTree::with_function(func, &cfg); + let domtree = DominatorTree::with_function(func, cfg); // Visit EBBs in a reverse post-order. let mut pos = Cursor::new(&mut func.layout); @@ -47,7 +47,7 @@ pub fn do_simple_gvn(func: &mut Function, cfg: &mut ControlFlowGraph) { use std::collections::hash_map::Entry::*; match entry { Occupied(mut entry) => { - if domtree.dominates(*entry.get(), inst, &pos.layout) { + if domtree.dominates(*entry.get(), inst, pos.layout) { func.dfg.replace_with_aliases(inst, *entry.get()); pos.remove_inst_and_step_back(); } else { diff --git a/lib/cretonne/src/topo_order.rs b/lib/cretonne/src/topo_order.rs index 55cece2c2f..323df99ef0 100644 --- a/lib/cretonne/src/topo_order.rs +++ b/lib/cretonne/src/topo_order.rs @@ -73,7 +73,7 @@ impl TopoOrder { } } } - return self.stack.pop(); + self.stack.pop() } } diff --git a/lib/cretonne/src/verifier/mod.rs b/lib/cretonne/src/verifier/mod.rs index a2f806a447..08aeb9249f 100644 --- a/lib/cretonne/src/verifier/mod.rs +++ b/lib/cretonne/src/verifier/mod.rs @@ -229,21 +229,21 @@ impl<'a> Verifier<'a> { self.verify_value(inst, res)?; } - match &self.func.dfg[inst] { - &MultiAry { ref args, .. } => { + match self.func.dfg[inst] { + MultiAry { ref args, .. } => { self.verify_value_list(inst, args)?; } - &Jump { + Jump { destination, ref args, .. } | - &Branch { + Branch { destination, ref args, .. } | - &BranchIcmp { + BranchIcmp { destination, ref args, .. @@ -251,41 +251,41 @@ impl<'a> Verifier<'a> { self.verify_ebb(inst, destination)?; self.verify_value_list(inst, args)?; } - &BranchTable { table, .. } => { + BranchTable { table, .. } => { self.verify_jump_table(inst, table)?; } - &Call { func_ref, ref args, .. } => { + Call { func_ref, ref args, .. } => { self.verify_func_ref(inst, func_ref)?; self.verify_value_list(inst, args)?; } - &IndirectCall { sig_ref, ref args, .. } => { + IndirectCall { sig_ref, ref args, .. } => { self.verify_sig_ref(inst, sig_ref)?; self.verify_value_list(inst, args)?; } - &StackLoad { stack_slot, .. } | - &StackStore { stack_slot, .. } => { + StackLoad { stack_slot, .. } | + StackStore { stack_slot, .. } => { self.verify_stack_slot(inst, stack_slot)?; } // Exhaustive list so we can't forget to add new formats - &Nullary { .. } | - &Unary { .. } | - &UnaryImm { .. } | - &UnaryIeee32 { .. } | - &UnaryIeee64 { .. } | - &Binary { .. } | - &BinaryImm { .. } | - &Ternary { .. } | - &InsertLane { .. } | - &ExtractLane { .. } | - &IntCompare { .. } | - &IntCompareImm { .. } | - &FloatCompare { .. } | - &HeapLoad { .. } | - &HeapStore { .. } | - &Load { .. } | - &Store { .. } | - &RegMove { .. } => {} + Nullary { .. } | + Unary { .. } | + UnaryImm { .. } | + UnaryIeee32 { .. } | + UnaryIeee64 { .. } | + Binary { .. } | + BinaryImm { .. } | + Ternary { .. } | + InsertLane { .. } | + ExtractLane { .. } | + IntCompare { .. } | + IntCompareImm { .. } | + FloatCompare { .. } | + HeapLoad { .. } | + HeapStore { .. } | + Load { .. } | + Store { .. } | + RegMove { .. } => {} } Ok(()) @@ -627,14 +627,14 @@ impl<'a> Verifier<'a> { got_succs.extend(cfg.get_successors(ebb)); let missing_succs: Vec = expected_succs.difference(&got_succs).cloned().collect(); - if missing_succs.len() != 0 { + if !missing_succs.is_empty() { return err!(ebb, "cfg lacked the following successor(s) {:?}", missing_succs); } let excess_succs: Vec = got_succs.difference(&expected_succs).cloned().collect(); - if excess_succs.len() != 0 { + if !excess_succs.is_empty() { return err!(ebb, "cfg had unexpected successor(s) {:?}", excess_succs); } @@ -642,14 +642,14 @@ impl<'a> Verifier<'a> { got_preds.extend(cfg.get_predecessors(ebb).iter().map(|&(_, inst)| inst)); let missing_preds: Vec = expected_preds.difference(&got_preds).cloned().collect(); - if missing_preds.len() != 0 { + if !missing_preds.is_empty() { return err!(ebb, "cfg lacked the following predecessor(s) {:?}", missing_preds); } let excess_preds: Vec = got_preds.difference(&expected_preds).cloned().collect(); - if excess_preds.len() != 0 { + if !excess_preds.is_empty() { return err!(ebb, "cfg had unexpected predecessor(s) {:?}", excess_preds); } diff --git a/lib/filecheck/src/checker.rs b/lib/filecheck/src/checker.rs index 6dcbdd2620..21d9049fee 100644 --- a/lib/filecheck/src/checker.rs +++ b/lib/filecheck/src/checker.rs @@ -66,7 +66,7 @@ impl Directive { return Err(Error::Syntax(format!("invalid variable name in regex: {}", rest))); } let var = rest[0..varlen].to_string(); - if !rest[varlen..].starts_with("=") { + if !rest[varlen..].starts_with('=') { return Err(Error::Syntax(format!("expected '=' after variable '{}' in regex: {}", var, rest))); @@ -196,7 +196,7 @@ impl Checker { // Check if `pat` matches in `range`. state.recorder.directive(dct_idx); if let Some((match_begin, match_end)) = state.match_positive(pat, range)? { - if let &Directive::Unordered(_) = dct { + if let Directive::Unordered(_) = *dct { // This was an unordered unordered match. // Keep track of the largest matched position, but leave `last_ordered` alone. state.max_match = max(state.max_match, match_end); @@ -231,7 +231,7 @@ impl Checker { // Verify any pending `not:` directives after the last ordered directive. for (not_idx, not_begin, rx) in nots.drain(..) { state.recorder.directive(not_idx); - if let Some(_) = rx.find(&text[not_begin..]) { + if rx.find(&text[not_begin..]).is_some() { // Matched `not:` pattern. // TODO: Use matched range for an error message. return Ok(false); diff --git a/lib/filecheck/src/lib.rs b/lib/filecheck/src/lib.rs index 66fe6036ab..8cca73736b 100644 --- a/lib/filecheck/src/lib.rs +++ b/lib/filecheck/src/lib.rs @@ -4,8 +4,8 @@ //! A list of directives is typically extracted from a file containing a test case. The test case //! is then run through the program under test, and its output matched against the directives. //! -//! See the [CheckerBuilder](struct.CheckerBuilder.html) and [Checker](struct.Checker.html) types -//! for the main library API. +//! See the [`CheckerBuilder`](struct.CheckerBuilder.html) and [`Checker`](struct.Checker.html) +//! types for the main library API. //! //! # Directives //! diff --git a/lib/reader/src/isaspec.rs b/lib/reader/src/isaspec.rs index b7884bc42c..3715f4ed6b 100644 --- a/lib/reader/src/isaspec.rs +++ b/lib/reader/src/isaspec.rs @@ -25,7 +25,7 @@ pub enum IsaSpec { impl IsaSpec { /// If the `IsaSpec` contains exactly 1 `TargetIsa` we return a reference to it pub fn unique_isa(&self) -> Option<&TargetIsa> { - if let &IsaSpec::Some(ref isa_vec) = self { + if let IsaSpec::Some(ref isa_vec) = *self { if isa_vec.len() == 1 { return Some(&*isa_vec[0]); } diff --git a/lib/reader/src/lexer.rs b/lib/reader/src/lexer.rs index bbbb023490..d4392a5bd9 100644 --- a/lib/reader/src/lexer.rs +++ b/lib/reader/src/lexer.rs @@ -171,7 +171,7 @@ impl<'a> Lexer<'a> { // Scan a single-char token. fn scan_char(&mut self, tok: Token<'a>) -> Result, LocatedError> { - assert!(self.lookahead != None); + assert_ne!(self.lookahead, None); let loc = self.loc(); self.next_ch(); token(tok, loc) @@ -184,7 +184,7 @@ impl<'a> Lexer<'a> { -> Result, LocatedError> { let loc = self.loc(); for _ in 0..count { - assert!(self.lookahead != None); + assert_ne!(self.lookahead, None); self.next_ch(); } token(tok, loc) @@ -206,7 +206,7 @@ impl<'a> Lexer<'a> { fn scan_comment(&mut self) -> Result, LocatedError> { let loc = self.loc(); let text = self.rest_of_line(); - return token(Token::Comment(text), loc); + token(Token::Comment(text), loc) } // Scan a number token which can represent either an integer or floating point number. @@ -305,8 +305,8 @@ impl<'a> Lexer<'a> { // decoded token. fn numbered_entity(prefix: &str, number: u32) -> Option> { match prefix { - "v" => Value::with_number(number).map(|v| Token::Value(v)), - "ebb" => Ebb::with_number(number).map(|ebb| Token::Ebb(ebb)), + "v" => Value::with_number(number).map(Token::Value), + "ebb" => Ebb::with_number(number).map(Token::Ebb), "ss" => Some(Token::StackSlot(number)), "jt" => Some(Token::JumpTable(number)), "fn" => Some(Token::FuncRef(number)), @@ -339,7 +339,7 @@ impl<'a> Lexer<'a> { }; if is_vector { if number <= u16::MAX as u32 { - base_type.by(number as u16).map(|t| Token::Type(t)) + base_type.by(number as u16).map(Token::Type) } else { None } @@ -352,7 +352,7 @@ impl<'a> Lexer<'a> { let loc = self.loc(); let begin = self.pos + 1; - assert!(self.lookahead == Some('%')); + assert_eq!(self.lookahead, Some('%')); while let Some(c) = self.next_ch() { if !(c.is_ascii() && c.is_alphanumeric() || c == '_') { @@ -368,7 +368,7 @@ impl<'a> Lexer<'a> { let loc = self.loc(); let begin = self.pos + 1; - assert!(self.lookahead == Some('#')); + assert_eq!(self.lookahead, Some('#')); while let Some(c) = self.next_ch() { if !char::is_digit(c, 16) { diff --git a/lib/reader/src/parser.rs b/lib/reader/src/parser.rs index bc8ebcfa0d..3745bd849e 100644 --- a/lib/reader/src/parser.rs +++ b/lib/reader/src/parser.rs @@ -282,7 +282,7 @@ impl<'a> Parser<'a> { None => break, } } - return self.lookahead; + self.lookahead } // Begin gathering comments associated with `entity`. @@ -397,7 +397,7 @@ impl<'a> Parser<'a> { fn error(&self, message: &str) -> Error { Error { - location: self.loc.clone(), + location: self.loc, message: message.to_string(), } } @@ -1066,7 +1066,7 @@ impl<'a> Parser<'a> { self.consume(); self.parse_instruction(results, encoding, result_locations, ctx, ebb)?; } - _ if results.len() != 0 => return err!(self.loc, "expected -> or ="), + _ if !results.is_empty() => return err!(self.loc, "expected -> or ="), _ => self.parse_instruction(results, encoding, result_locations, ctx, ebb)?, } } diff --git a/lib/reader/src/sourcemap.rs b/lib/reader/src/sourcemap.rs index d905cdb9ab..d590a5220f 100644 --- a/lib/reader/src/sourcemap.rs +++ b/lib/reader/src/sourcemap.rs @@ -208,7 +208,7 @@ impl MutableSourceMap for SourceMap { } fn def_entity(&mut self, entity: AnyEntity, loc: &Location) -> Result<()> { - if self.locations.insert(entity, loc.clone()).is_some() { + if self.locations.insert(entity, *loc).is_some() { err!(loc, "duplicate entity: {}", entity) } else { Ok(())