diff --git a/cranelift/filetests/filetests/isa/x64/simd-bitwise-compile.clif b/cranelift/filetests/filetests/isa/x64/simd-bitwise-compile.clif
new file mode 100644
index 0000000000..fe94b84548
--- /dev/null
+++ b/cranelift/filetests/filetests/isa/x64/simd-bitwise-compile.clif
@@ -0,0 +1,17 @@
+test compile
+set enable_simd
+target x86_64 skylake
+feature "experimental_x64"
+
+function %bitselect_i16x8() -> i16x8 {
+block0:
+    v0 = vconst.i16x8 [0 0 0 0 0 0 0 0]
+    v1 = vconst.i16x8 [0 0 0 0 0 0 0 0]
+    v2 = vconst.i16x8 [0 0 0 0 0 0 0 0]
+    v3 = bitselect v0, v1, v2
+    return v3
+}
+; check:  pand    %xmm0, %xmm1
+; nextln: pandn   %xmm2, %xmm0
+; nextln: por     %xmm1, %xmm0
+; not:    movdqa
diff --git a/cranelift/filetests/filetests/isa/x64/simd-bitwise-run.clif b/cranelift/filetests/filetests/isa/x64/simd-bitwise-run.clif
new file mode 100644
index 0000000000..3f1c814a2c
--- /dev/null
+++ b/cranelift/filetests/filetests/isa/x64/simd-bitwise-run.clif
@@ -0,0 +1,12 @@
+test run
+set enable_simd
+target x86_64 skylake
+feature "experimental_x64"
+
+function %bitselect_i8x16(i8x16, i8x16, i8x16) -> i8x16 {
+block0(v0: i8x16, v1: i8x16, v2: i8x16):
+    v3 = bitselect v0, v1, v2
+    return v3
+}
+; Remember that bitselect accepts: 1) the selector vector, 2) the "if true" vector, and 3) the "if false" vector.
+; run: %bitselect_i8x16([0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 255], [127 0 0 0 0 0 0 0 0 0 0 0 0 0 0 42], [42 0 0 0 0 0 0 0 0 0 0 0 0 0 0 127]) == [42 0 0 0 0 0 0 0 0 0 0 0 0 0 0 42]
diff --git a/cranelift/filetests/filetests/isa/x64/simd-logical-compile.clif b/cranelift/filetests/filetests/isa/x64/simd-logical-compile.clif
new file mode 100644
index 0000000000..0e366db441
--- /dev/null
+++ b/cranelift/filetests/filetests/isa/x64/simd-logical-compile.clif
@@ -0,0 +1,30 @@
+test compile
+set enable_simd
+target x86_64 skylake
+feature "experimental_x64"
+
+function %bnot_b32x4(b32x4) -> b32x4 {
+block0(v0: b32x4):
+    v1 = bnot v0
+    return v1
+}
+; check:  pcmpeqd %xmm1, %xmm1
+; nextln: pxor    %xmm1, %xmm0
+
+function %vany_true_b32x4(b32x4) -> b1 {
+block0(v0: b32x4):
+    v1 = vany_true v0
+    return v1
+}
+; check:  ptest   %xmm0, %xmm0
+; nextln: setnz   %r12b
+
+function %vall_true_i64x2(i64x2) -> b1 {
+block0(v0: i64x2):
+    v1 = vall_true v0
+    return v1
+}
+; check:  pxor    %xmm1, %xmm1
+; nextln: pcmpeqq %xmm0, %xmm1
+; nextln: ptest   %xmm1, %xmm1
+; nextln: setz    %r12b
diff --git a/cranelift/filetests/filetests/isa/x64/simd-logical-run.clif b/cranelift/filetests/filetests/isa/x64/simd-logical-run.clif
new file mode 100644
index 0000000000..ff0231e459
--- /dev/null
+++ b/cranelift/filetests/filetests/isa/x64/simd-logical-run.clif
@@ -0,0 +1,60 @@
+test run
+set enable_simd
+target x86_64
+feature "experimental_x64"
+
+function %bnot() -> b32 {
+block0:
+    v0 = vconst.b32x4 [true true true false]
+    v1 = bnot v0
+    v2 = extractlane v1, 3
+    return v2
+}
+; run
+
+function %band_not() -> b1 {
+block0:
+    v0 = vconst.i16x8 [1 0 0 0 0 0 0 0]
+    v1 = vconst.i16x8 [0 0 0 0 0 0 0 0]
+    v2 = band_not v0, v1
+    v3 = extractlane v2, 0
+    v4 = icmp_imm eq v3, 1
+    return v4
+}
+; run
+
+function %vany_true_i16x8() -> b1 {
+block0:
+    v0 = vconst.i16x8 [1 0 0 0 0 0 0 0]
+    v1 = vany_true v0
+    return v1
+}
+; run
+
+function %vany_true_b32x4() -> b1 {
+block0:
+    v0 = vconst.b32x4 [false false false false]
+    v1 = vany_true v0
+    v2 = bint.i32 v1
+    v3 = icmp_imm eq v2, 0
+    return v3
+}
+; run
+
+function %vall_true_i16x8() -> b1 {
+block0:
+    v0 = vconst.i16x8 [1 0 0 0 0 0 0 0]
+    v1 = vall_true v0
+    v2 = bint.i32 v1
+    v3 = icmp_imm eq v2, 0
+    return v3
+}
+; run
+
+function %vall_true_b32x4() -> b1 {
+block0:
+    v0 = vconst.b32x4 [true true true true]
+    v1 = vall_true v0
+    return v1
+}
+; run