machinst x64: use movss for f32 loads;

2020-07-02 12:31:50 +02:00
parent d87ada209c
commit 08efcbd9d5
1 changed files with 1 additions and 1 deletions
--- a/cranelift/codegen/src/isa/x64/lower.rs
+++ b/cranelift/codegen/src/isa/x64/lower.rs
@@ -515,7 +515,7 @@ fn lower_insn_to_regs<C: LowerCtx<I = Inst>>(ctx: &mut C, insn: IRInst) -> Codeg
                }
                (_, true) => {
                    ctx.emit(match elem_ty {
-                        F32 => Inst::xmm_mov_rm_r(SseOpcode::Movd, RegMem::mem(addr), dst),
+                        F32 => Inst::xmm_mov_rm_r(SseOpcode::Movss, RegMem::mem(addr), dst),
                        _ => unimplemented!("FP load not 32-bit"),
                    });
                }