Add x86 implementation of splat instruction

cranelift/filetests/filetests/isa/x86/legalize-splat.clif

@@ -0,0 +1,73 @@
+test compile
+set enable_simd=true
+set probestack_enabled=false
+target x86_64 haswell
+
+; use baldrdash calling convention here for simplicity (avoids prologue, epilogue)
+function %test_splat_i32() -> i32x4 baldrdash {
+ebb0:
+    v0 = iconst.i32 42
+    v1 = splat.i32x4 v0
+    return v1
+}
+
+; sameln: function %test_splat_i32() -> i32x4 [%xmm0] baldrdash {
+; nextln:   ss0 = incoming_arg 0, offset 0
+; nextln: 
+; nextln:   ebb0:
+; nextln:     v0 = iconst.i32 42
+; nextln:     v2 = scalar_to_vector.i32x4 v0
+; nextln:     v1 = x86_pshufd v2, 0
+; nextln:     return v1
+; nextln: }
+
+
+
+function %test_splat_i64() -> i64x2 baldrdash {
+ebb0:
+    v0 = iconst.i64 42
+    v1 = splat.i64x2 v0
+    return v1
+}
+
+; check:   ebb0:
+; nextln:     v0 = iconst.i64 42
+; nextln:     v2 = scalar_to_vector.i64x2 v0
+; nextln:     v1 = insertlane v2, 1, v0
+; nextln:     return v1
+
+
+
+function %test_splat_b16() -> b16x8 baldrdash {
+ebb0:
+    v0 = bconst.b16 true
+    v1 = splat.b16x8 v0
+    return v1
+}
+
+; check:   ebb0:
+; nextln:     v0 = bconst.b16 true
+; nextln:     v2 = scalar_to_vector.b16x8 v0
+; nextln:     v3 = insertlane v2, 1, v0
+; nextln:     v4 = raw_bitcast.i32x4 v3
+; nextln:     v5 = x86_pshufd v4, 0
+; nextln:     v1 = raw_bitcast.b16x8 v5
+; nextln:     return v1
+
+
+
+function %test_splat_i8() -> i8x16 baldrdash {
+ebb0:
+    v0 = iconst.i8 42
+    v1 = splat.i8x16 v0
+    return v1
+}
+
+; check:   ebb0:
+; nextln:     v2 = iconst.i32 42
+; nextln:     v0 = ireduce.i8 v2
+; nextln:     v3 = scalar_to_vector.i8x16 v0
+; nextln:     v4 = f64const 0.0
+; nextln:     v5 = bitcast.i8x16 v4
+; nextln:     v1 = x86_pshufb v3, v5
+; nextln:     return v1