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Rename 'an block' to 'a block'

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Missed this in the automatic rename of 'Ebb' to 'Block'.
This commit is contained in:
Ryan Hunt
2020-03-03 13:17:30 -06:00
parent 77e17d8f71
commit 07f335dca6
31 changed files with 96 additions and 96 deletions
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8
cranelift/codegen/src/regalloc/coalescing.rs
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@@ -2,7 +2,7 @@
//!
//! Conventional SSA (CSSA) form is a subset of SSA form where any (transitively) phi-related
//! values do not interfere. We construct CSSA by building virtual registers that are as large as
//! possible and inserting copies where necessary such that all argument values passed to an block
//! possible and inserting copies where necessary such that all argument values passed to a block
//! parameter will belong to the same virtual register as the block parameter value itself.
use crate::cursor::{Cursor, EncCursor};
@@ -233,7 +233,7 @@ impl<'a> Context<'a> {
}
// Check for basic interference: If `arg` overlaps a value defined at the entry to
// `block`, it can never be used as an block argument.
// `block`, it can never be used as a block argument.
let interference = {
let lr = &self.liveness[arg];
@@ -874,7 +874,7 @@ struct VirtualCopies {
// Filter for the currently active node iterator.
//
// An block => (set_id, num) entry means that branches to `block` are active in `set_id` with
// A block => (set_id, num) entry means that branches to `block` are active in `set_id` with
// branch argument number `num`.
filter: FxHashMap<Block, (u8, usize)>,
}
@@ -953,7 +953,7 @@ impl VirtualCopies {
debug_assert_eq!(popped, Some(param));
// The domtree pre-order in `self.params` guarantees that all parameters defined at the
// same block will be adjacent. This means we can see when all parameters at an block have been
// same block will be adjacent. This means we can see when all parameters at a block have been
// merged.
//
// We don't care about the last parameter - when that is merged we are done.

6
cranelift/codegen/src/regalloc/coloring.rs
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@@ -24,7 +24,7 @@
//! a register.
//!
//! 5. The code must be in Conventional SSA form. Among other things, this means that values passed
//! as arguments when branching to an block must belong to the same virtual register as the
//! as arguments when branching to a block must belong to the same virtual register as the
//! corresponding block argument value.
//!
//! # Iteration order
@@ -35,7 +35,7 @@
//! defined by the instruction and only consider the colors of other values that are live at the
//! instruction.
//!
//! The first time we see a branch to an block, the block's argument values are colored to match the
//! The first time we see a branch to a block, the block's argument values are colored to match the
//! registers currently holding branch argument values passed to the predecessor branch. By
//! visiting blocks in a CFG topological order, we guarantee that at least one predecessor branch has
//! been visited before the destination block. Therefore, the block's arguments are already colored.
@@ -224,7 +224,7 @@ impl<'a> Context<'a> {
SingleDest(block, _) => block,
};
// We have a single branch with a single target, and an block with a single
// We have a single branch with a single target, and a block with a single
// predecessor. Thus we can forward the diversion set to the next block.
if self.cfg.pred_iter(target).count() == 1 {
// Transfer the diversion to the next block.

4
cranelift/codegen/src/regalloc/diversion.rs
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@@ -4,7 +4,7 @@
//! Sometimes, it is necessary to move register values to a different register in order to satisfy
//! instruction constraints.
//!
//! These register diversions are local to an block. No values can be diverted when entering a new
//! These register diversions are local to a block. No values can be diverted when entering a new
//! block.
use crate::fx::FxHashMap;
@@ -38,7 +38,7 @@ impl Diversion {
}
}
/// Keep track of diversions in an block.
/// Keep track of diversions in a block.
#[derive(Clone)]
pub struct RegDiversions {
current: FxHashMap<Value, Diversion>,

8
cranelift/codegen/src/regalloc/live_value_tracker.rs
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@@ -1,6 +1,6 @@
//! Track which values are live in an block with instruction granularity.
//! Track which values are live in a block with instruction granularity.
//!
//! The `LiveValueTracker` keeps track of the set of live SSA values at each instruction in an block.
//! The `LiveValueTracker` keeps track of the set of live SSA values at each instruction in a block.
//! The sets of live values are computed on the fly as the tracker is moved from instruction to
//! instruction, starting at the block header.
@@ -16,13 +16,13 @@ use alloc::vec::Vec;
type ValueList = EntityList<Value>;
/// Compute and track live values throughout an block.
/// Compute and track live values throughout a block.
pub struct LiveValueTracker {
/// The set of values that are live at the current program point.
live: LiveValueVec,
/// Saved set of live values for every jump and branch that can potentially be an immediate
/// dominator of an block.
/// dominator of a block.
///
/// This is the set of values that are live *before* the branch.
idom_sets: FxHashMap<Inst, ValueList>,

2
cranelift/codegen/src/regalloc/liveness.rs
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@@ -18,7 +18,7 @@
//!
//! The set of `LiveRange` instances can answer these questions through their `def_local_end` and
//! `livein_local_end` queries. The coloring algorithm visits blocks in a topological order of the
//! dominator tree, so it can compute the set of live values at the beginning of an block by starting
//! dominator tree, so it can compute the set of live values at the beginning of a block by starting
//! from the set of live values at the dominating branch instruction and filtering it with
//! `livein_local_end`. These sets do not need to be stored in the liveness analysis.
//!

12
cranelift/codegen/src/regalloc/liverange.rs
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@@ -131,7 +131,7 @@ use smallvec::SmallVec;
/// 2. The *live-in intervals* are the local intervals in the remaining blocks.
///
/// A live-in interval always begins at the block header, while the def interval can begin at the
/// defining instruction, or at the block header for an block argument value.
/// defining instruction, or at the block header for a block argument value.
///
/// All values have a def interval, but a large proportion of values don't have any live-in
/// intervals. These are called *local live ranges*.
@@ -139,7 +139,7 @@ use smallvec::SmallVec;
/// # Program order requirements
///
/// The internal representation of a `LiveRange` depends on a consistent `ProgramOrder` both for
/// ordering instructions inside an block *and* for ordering blocks. The methods that depend on the
/// ordering instructions inside a block *and* for ordering blocks. The methods that depend on the
/// ordering take an explicit `ProgramOrder` object, and it is the caller's responsibility to
/// ensure that the provided ordering is consistent between calls.
///
@@ -363,7 +363,7 @@ impl<PO: ProgramOrder> GenericLiveRange<PO> {
/// Get the program point where this live range is defined.
///
/// This will be an block header when the value is an block argument, otherwise it is the defining
/// This will be a block header when the value is a block argument, otherwise it is the defining
/// instruction.
pub fn def(&self) -> ProgramPoint {
self.def_begin
@@ -385,7 +385,7 @@ impl<PO: ProgramOrder> GenericLiveRange<PO> {
self.def_end
}
/// Get the local end-point of this live range in an block where it is live-in.
/// Get the local end-point of this live range in a block where it is live-in.
///
/// If this live range is not live-in to `block`, return `None`. Otherwise, return the end-point
/// of this live range's local interval in `block`.
@@ -409,7 +409,7 @@ impl<PO: ProgramOrder> GenericLiveRange<PO> {
/// Is this value live-in to `block`?
///
/// An block argument is not considered to be live in.
/// A block argument is not considered to be live in.
pub fn is_livein(&self, block: Block, order: &PO) -> bool {
self.livein_local_end(block, order).is_some()
}
@@ -594,7 +594,7 @@ mod tests {
assert!(lr.is_local());
assert_eq!(lr.def(), e2.into());
assert_eq!(lr.def_local_end(), e2.into());
// The def interval of an block argument does not count as live-in.
// The def interval of a block argument does not count as live-in.
assert_eq!(lr.livein_local_end(e2, PO), None);
PO.validate(&lr);
}

2
cranelift/codegen/src/regalloc/spilling.rs
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@@ -199,7 +199,7 @@ impl<'a> Context<'a> {
self.pressure.reset();
self.take_live_regs(liveins);
// An block can have an arbitrary (up to 2^16...) number of parameters, so they are not
// A block can have an arbitrary (up to 2^16...) number of parameters, so they are not
// guaranteed to fit in registers.
for lv in params {
if let Affinity::Reg(rci) = lv.affinity {

4
cranelift/codegen/src/regalloc/virtregs.rs
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@@ -5,11 +5,11 @@
//! output.
//!
//! A virtual register is typically built by merging together SSA values that are "phi-related" -
//! that is, one value is passed as an block argument to a branch and the other is the block parameter
//! that is, one value is passed as a block argument to a branch and the other is the block parameter
//! value itself.
//!
//! If any values in a virtual register are spilled, they will use the same stack slot. This avoids
//! memory-to-memory copies when a spilled value is passed as an block argument.
//! memory-to-memory copies when a spilled value is passed as a block argument.
use crate::dbg::DisplayList;
use crate::dominator_tree::DominatorTreePreorder;