ISLE: Lowering of multi-output instructions (#3783)

This changes the output of the `lower` constructor from a
`ValueRegs` to a new `InstOutput` type, which is a vector
of `ValueRegs`.

Code in `lower_common` is updated to use this new type to
handle instructions with multiple outputs.  All back-ends
are updated to use the new type.

cranelift/codegen/src/isa/x64/inst.isle

@@ -1009,20 +1009,20 @@
 (rule (put_in_xmm_mem_imm val)
       (xmm_mem_imm_new (put_in_reg_mem_imm val)))
 
-;; Construct a `ValueRegs` out of a single GPR register.
-(decl value_gpr (Gpr) ValueRegs)
-(rule (value_gpr x)
-      (value_reg (gpr_to_reg x)))
+;; Construct an `InstOutput` out of a single GPR register.
+(decl output_gpr (Gpr) InstOutput)
+(rule (output_gpr x)
+      (output_reg (gpr_to_reg x)))
 
 ;; Construct a `ValueRegs` out of two GPR registers.
 (decl value_gprs (Gpr Gpr) ValueRegs)
 (rule (value_gprs x y)
       (value_regs (gpr_to_reg x) (gpr_to_reg y)))
 
-;; Construct a `ValueRegs` out of a single XMM register.
-(decl value_xmm (Xmm) ValueRegs)
-(rule (value_xmm x)
-      (value_reg (xmm_to_reg x)))
+;; Construct an `InstOutput` out of a single XMM register.
+(decl output_xmm (Xmm) InstOutput)
+(rule (output_xmm x)
+      (output_reg (xmm_to_reg x)))
 
 ;; Get the `n`th reg in a `ValueRegs` and construct a GPR from it.
 ;;
@@ -2223,7 +2223,7 @@
 
 ;;;; Automatic conversions ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
-(convert Gpr ValueRegs value_gpr)
+(convert Gpr InstOutput output_gpr)
 (convert Value Gpr put_in_gpr)
 (convert Value GprMem put_in_gpr_mem)
 (convert Value GprMemImm put_in_gpr_mem_imm)
@@ -2242,7 +2242,7 @@
 (convert WritableGpr WritableReg writable_gpr_to_reg)
 (convert WritableGpr Reg writable_gpr_to_r_reg)
 
-(convert Xmm ValueRegs value_xmm)
+(convert Xmm InstOutput output_xmm)
 (convert Value Xmm put_in_xmm)
 (convert Value XmmMem put_in_xmm_mem)
 (convert Value XmmMemImm put_in_xmm_mem_imm)

cranelift/codegen/src/isa/x64/lower.isle

@@ -2,7 +2,7 @@
 
 ;; The main lowering constructor term: takes a clif `Inst` and returns the
 ;; register(s) within which the lowered instruction's result values live.
-(decl lower (Inst) ValueRegs)
+(decl lower (Inst) InstOutput)
 
 ;;;; Rules for `iconst` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
@@ -148,48 +148,39 @@
 ;; replace this with a bool carry flag, and all consumers of `iflags`
 ;; remain in the handwritten pattern-matching code and explicitly
 ;; match on the flags producer. So we can get away with just
-;; allocating a second temp so that the reg-renaming code does the
+;; using an invalid second output, and the reg-renaming code does the
 ;; right thing, for now. For safety, we assert elsewhere that no one
 ;; actually uses the register assigned to the SSA `iflags`-typed
 ;; `Value`.
 
-(decl unused_iflags () Gpr)
-(rule (unused_iflags)
-      (temp_writable_gpr))
+(decl output_ifcout (Reg) InstOutput)
+(rule (output_ifcout reg)
+      (output_pair reg (value_regs_invalid)))
 
 ;; Add two registers.
 (rule (lower (has_type (fits_in_64 ty)
                        (iadd_ifcout x y)))
-      (value_gprs (add ty x y)
-                  (unused_iflags)))
+      (output_ifcout (add ty x y)))
 
 ;; Add a register and an immediate.
 
 (rule (lower (has_type (fits_in_64 ty)
                        (iadd_ifcout x (simm32_from_value y))))
-      (value_gprs (add ty x y)
-                  (unused_iflags)))
+      (output_ifcout (add ty x y)))
 
 (rule (lower (has_type (fits_in_64 ty)
                        (iadd_ifcout (simm32_from_value x) y)))
-      (value_gprs (add ty y x)
-                  (unused_iflags)))
+      (output_ifcout (add ty y x)))
 
 ;; Add a register and memory.
 
 (rule (lower (has_type (fits_in_64 ty)
                        (iadd_ifcout x (sinkable_load y))))
-      (value_gprs (add ty
-                       x
-                       (sink_load_to_gpr_mem_imm y))
-                  (unused_iflags)))
+      (output_ifcout (add ty x (sink_load_to_gpr_mem_imm y))))
 
 (rule (lower (has_type (fits_in_64 ty)
                        (iadd_ifcout (sinkable_load x) y)))
-      (value_gprs (add ty
-                       y
-                       (sink_load_to_gpr_mem_imm x))
-                  (unused_iflags)))
+      (output_ifcout (add ty y (sink_load_to_gpr_mem_imm x))))
 
 ;; (No `iadd_ifcout` for `i128`.)
 

cranelift/codegen/src/isa/x64/lower/isle/generated_code.manifest

@@ -1,4 +1,4 @@
 src/clif.isle 9ea75a6f790b5c03
-src/prelude.isle 8bf92e18323e7041
-src/isa/x64/inst.isle 1948445a25530d71
-src/isa/x64/lower.isle d1ee574941be387
+src/prelude.isle 957023853b23dacb
+src/isa/x64/inst.isle 5ee89205e6e9a46b
+src/isa/x64/lower.isle 348a808ea5de4cdb