Cranelift AArch64: Add initial support for the Armv8.1 atomics

This commit enables Cranelift's AArch64 backend to generate code
for instruction set extensions (previously only the base Armv8-A
architecture was supported); also, it makes it possible to detect
the extensions supported by the host when JIT compiling. The new
functionality is applied to the IR instruction `AtomicCas`.

Copyright (c) 2021, Arm Limited.

cranelift/codegen/src/isa/aarch64/settings.rs

@@ -0,0 +1,9 @@
+//! AArch64 Settings.
+
+use crate::settings::{self, detail, Builder};
+use core::fmt;
+
+// Include code generated by `cranelift-codegen/meta/src/gen_settings.rs:`. This file contains a
+// public `Flags` struct with an impl for all of the settings defined in
+// `cranelift-codegen/meta/src/isa/arm64/settings.rs`.
+include!(concat!(env!("OUT_DIR"), "/settings-arm64.rs"));